x86_64究竟有几个ring?
看到很多地方都说x86_64只有两个ring:ring 0和ring 3
比如:
1、 http://wiki.osdev.org/Security 提到"However, many architectures have only two rings (e.g. x86_64), corresponding to ring 0 and 3 in this description."
2、Prentice.Hall.The.Definitive.Guide.to.the.Xen.Hypervisor.Nov.2007.pdf 一本讲虚拟化的书
1.7.1 The Hypervisor, the OS, and the Applications 提到 When AMD tidied up the IA32 architecture as part of the process of creating x86-64, one of the things it did was reduce the number of rings.
但是我翻遍了 《Intel 64 and IA_32 Architectures Software Developer's Manual》也没有找到说x86_64只有2个ring的地方
于是自己写了一段代码:
对 arch/x86/boot/compressed/head_64.S 做了修改
选择这个文件没有别的意思,只是因为bzImage内核启动过程中,在这个文件中,进入了long mode。
在刚进入(ring0)long mode之后,利用iret依次切换到ring1 ring2 ring3 然后在ring3中死循环。
在每一个ring中在屏幕上输出一个表示当前ring number的数字,
(在物理机DELL R710和KVM虚拟机中验证的)结果表明,输出了0123
这应该改说明x86_64是有4个ring吧?
另外还测试了不同ring的代码对不同ring的数据访问能力,如下表 data level 0 1 2 3
code level
0 Y Y Y Y
1 N Y Y Y
2 N N Y Y
3 N N N Y
这应该说明,四个ring确实是不同的吧?
有没有懂这方面的兄弟,科普一下!
回复 1# sanbiangongzi
对arch/x86/boot/compressed/head_64.S 修改内容如下:140c140,141
< movl $0x00000183, %eax
---
> /* movl $0x00000183, %eax */
> movl $0x00000187, %eax /* assign RING3 access right */
214a216,323
> #define __KERNEL_CS_RING1(6 * 8 + 1)
> #define __KERNEL_DS_RING1(7 * 8 + 1)
> #define __KERNEL_CS_RING2(8 * 8 + 2)
> #define __KERNEL_DS_RING2(9 * 8 + 2)
> #define __KERNEL_CS_RING3(10 * 8 + 3)
> #define __KERNEL_DS_RING3(11 * 8 + 3)
>
> .global ring_test
> ring_test:
> # ring 0 print
> movw $(0x0500 + '0'), %ax
> movw %ax, 0xb80a0
>
>
> # to higher ring
> push $__KERNEL_DS_RING1
> push %rsp
> pushf
> pop %rax
> or $0x1000, %rax
> push %rax
> push $__KERNEL_CS_RING1
> lea 1f(%rbp), %rax
> push %rax
> iretq
> 1:
> xorl %eax, %eax
> movl $__KERNEL_DS_RING1, %eax
> movl %eax, %ds
> movw $(0x0500 + '1'), %ax
> movw %ax, 0xb80a0 + 2 * 1
>
> /*
> movl $__KERNEL_DS, %eax
> movl %eax, %es
> movl %es:(0x100000), %eax
> */
>
> movl $__KERNEL_DS_RING2, %eax
> movl %eax, %es
> movl %es:(0x100000), %eax
>
> movl $__KERNEL_DS_RING3, %eax
> movl %eax, %es
> movl %es:(0x100000), %eax
>
> # to higher ring
> push $__KERNEL_DS_RING2
> push %rsp
> pushf
> pop %rax
> or $0x2000, %rax
> push %rax
> push $__KERNEL_CS_RING2
> lea 1f(%rbp), %rax
> push %rax
> iretq
> 1:
> xorl %eax, %eax
> movl $__KERNEL_DS_RING2, %eax
> movl %eax, %ds
> movw $(0x0500 + '2'), %ax
> movw %ax, 0xb80a0 + 2 * 2
>
> /*
> movl $__KERNEL_DS_RING1, %eax
> movl %eax, %es
> movl %es:(0x100000), %eax
> */
>
> movl $__KERNEL_DS_RING3, %eax
> movl %eax, %es
> movl %es:(0x100000), %eax
>
> # to higher ring
> push $__KERNEL_DS_RING3
> push %rsp
> pushf
> pop %rax
> or $0x3000, %rax
> push %rax
> push $__KERNEL_CS_RING3
> lea 1f(%rbp), %rax
> push %rax
> iretq
> 1:
> xorl %eax, %eax
> movl $__KERNEL_DS_RING3, %eax
> movl %eax, %ds
> movw $(0x0500 + '3'), %ax
> movw %ax, 0xb80a0 + 2 * 3
>
> /*
> movl $__KERNEL_DS_RING1, %eax
> movl %eax, %es
> movl %es:(0x100000), %eax
>
> movl $__KERNEL_DS_RING2, %eax
> movl %eax, %es
> movl %es:(0x100000), %eax
> */
>
> jmp .
>
>
299a409,410
>
>
309a421,427
>
> .quad 0x00afba000000ffff /* __KERNEL_CS_RING1 */
> .quad 0x00cfb2000000ffff /* __KERNEL_DS_RING1 */
> .quad 0x00afda000000ffff /* __KERNEL_CS_RING2 */
> .quad 0x00cfd2000000ffff /* __KERNEL_DS_RING2 */
> .quad 0x00affa000000ffff /* __KERNEL_CS_RING3 */
> .quad 0x00cff2000000ffff /* __KERNEL_DS_RING3 */ 回复 2# sanbiangongzi
忘了说两次测试 CPU分别是
Intel(R) Xeon(R) CPU E5506@ 2.13GHz 物理机
和
Intel(R) Xeon(R) CPU E5540@ 2.53GHz 虚拟机
However, many architectures have only two rings (e.g. x86_64), corresponding to ring 0 and 3 in this description."
However, many architectures have only two rings (e.g. x86_64), corresponding to ring 0 and 3 in this description."
x86 has ring 0,1,2,3, but for portable, linux (windows too) just use two: ring 0 & ring 3.
good luck 回复 4# folklore
However, many architectures have only two rings (e.g. x86_64), corresponding to ring 0 and 3 in this description.
x86 has ring 0,1,2,3, but for portable, linux (windows too) just use two: ring 0 & ring 3.
谢谢这位兄台的回复,但是好像还是没有弄明白,我想知道的CPU究竟总共有几个RING,这与操作系统使用了其中的几个RING是,两个不同的问题。
上面提到的文档是说,x86_64减少了ring的数量,但是我的测试代码,证实了ring1/2的存在
我想知道,这些文档提到”x86_64减少了ring的数量“是出于什么样的背景呢?应该不是乱说吧。 本帖最后由 atz0001 于 2012-05-24 11:55 编辑
老大,当然以 Intel 的手册为准啦,何况你在真实的 CPU 上验证过。
我看你水平很高啊,至少比我高很多。自信点。
又看了下手册,感觉 ring/Privilege-level 这个概念是 Segment protection 的,
现在推荐用page protection 的,那么 ring 这个概念基本不相干了.
猜的.
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