另外一台sun3500的问题。加急！！！！

2004秋

===============================================\r\nsun3500通过scsi线与一磁盘阵列相连，在阵列上做有两个卷vol01、vol02。用户一次用reboot做了重启后，发现看不到两个卷，文件没有挂接。\r\n以下是机器启动时的一些信息：\r\nWARNING：forceload of drv/atf failed\r\n。\r\n。\r\n。\r\nWARNING：forceload of drv/ses failed\r\nWARNING：Firmware does not support Dynamic reconfiguration\r\n。\r\n。\r\n。\r\nchecking ufs startup:\r\n/dev/vx/rdsk/datadg/vol02:BaD INODE NUMBER FOR”I＝3557760 OWNER＝root MODE＝40755\r\n/dev/vx/rdsk/datadg/vol02:size=512 MTIME=sep 22,12,12,2003\r\n/dev/vx/rdsk/datadg/vol02IR=/lost+found/＃03557760\r\n/dev/vx/rdsk/datadg/vol02:UNExpected inconsistency, RUN fsck MANUALLy\r\n/dev/vx/rdsk/rootdg/vol01:is clean\r\nThe following file system(s) HAD AN UNExpected inconsistency:\r\n/dev/vx/rdsk/datadg/vol02(/database)\r\nWARNING- Unable to repair one or more of the following filesystem(s)\r\n   /dev/vx/rdsk/rootdg/vol01     /dev/vx/rdsk/datadg/vol02\r\nRUN fsck manully (fsck filesystem)\r\nExit the shell when done to continue the boot  process\r\n\r\nType control-d to proceed with normal startup:\r\n(or give root password for system maintenance)\r\n\r\n信息中提示手动运行fsck，也运行过，还是没有恢复。是不是这种问题执行fsck一般都能恢复？\r\n另外，在执行fsck过程中，是不是系统每次的提问如“salvage？fix？adjust？clear？”等等都是回答yes？？？\r\n\r\n＝＝＝＝＝＝\r\n以下是从这台3500的串口获得的信息：\r\nSoftware Power ON\r\n\r\n@(#) Ultra Enterprise 3.2 Version 19 created 1998/10/20 18:13\r\nCPU = 0000.0000.0000.000e\r\nProbing keyboard Done\r\n\r\n7,0>;\r\n\r\n7,0>;@(#) POST 3.9.8 1998/11/09 15:09\r\n\r\n7,1>;\r\n\r\n7,0>;\r\n\r\n    SelfTest Initializing (Diag Level 10, ENV 00004001) IMPL 0011 MASK 20\r\n\r\n7,1>;@(#) POST 3.9.8 1998/11/09 15:09\r\n\r\n7,0>;Board 7 CPU FPROM Test\r\n\r\n7,1>;\r\n\r\n    SelfTest Initializing (Diag Level 10, ENV 00000000) IMPL 0011 MASK 20\r\n\r\n7,0>;Board 7 Basic CPU Test\r\n\r\n7,0>;    Set CPU UPA Config and Init SDB Data\r\n\r\n7,0>;        SRAM Mode = 22, Clock Mode = 4:1, PCON = 6b3, MCAP = 0\r\n\r\n7,0>;Board 7 MMU Enable Test\r\n\r\n7,0>;    DMMU Init\r\n\r\n7,0>;    IMMU Init\r\n\r\n7,0>;    Mapping Selftest Enabling MMUs\r\n\r\n7,0>;Board 7 Ecache Test\r\n\r\n7,0>;    Ecache Probe\r\n\r\n7,0>;    Ecache Tags\r\n\r\n7,1>;Board 7 CPU FPROM Test\r\n\r\n7,1>;Board 7 Basic CPU Test\r\n\r\n7,1>;    Set CPU UPA Config and Init SDB Data\r\n\r\n7,1>;        SRAM Mode = 22, Clock Mode = 4:1, PCON = 6b3, MCAP = 0\r\n\r\n7,1>;Board 7 MMU Enable Test\r\n\r\n7,1>;    DMMU Init\r\n\r\n7,1>;    IMMU Init\r\n\r\n7,1>;    Mapping Selftest Enabling MMUs\r\n\r\n7,1>;Board 7 Ecache Test\r\n\r\n7,1>;    Ecache Probe\r\n\r\n7,1>;    Ecache Tags\r\n\r\n7,0>;    Ecache Quick Verify\r\n\r\n7,1>;    Ecache Quick Verify\r\n\r\n7,0>;    Ecache Init\r\n\r\n7,1>;    Ecache Init\r\n\r\n7,0>;    Ecache RAM\r\n\r\n7,1>;    Ecache RAM\r\n\r\n7,0>;    Ecache Address Line\r\n\r\n7,0>;    Configure Ecache Limit\r\n\r\n7,0>;Ecache Size = 00400000,  Limited to 00400000 \r\n\r\n7,0>;Board 7 FPU Functional Test\r\n\r\n7,0>;    FPU Enable\r\n\r\n7,0>;Board 7 Board Master Select Test\r\n\r\n7,0>;    Selecting a Board Master\r\n\r\n7,0>;Board 7 FireHose Devices Test\r\n\r\n7,1>;    Ecache Address Line\r\n\r\n7,1>;    Configure Ecache Limit\r\n\r\n7,1>;Ecache Size = 00400000,  Limited to 00400000 \r\n\r\n7,1>;Board 7 FPU Functional Test\r\n\r\n7,1>;    FPU Enable\r\n\r\n7,1>;Board 7 Board Master Select Test\r\n\r\n7,1>;    Selecting a Board Master\r\n\r\n7,0>;Board 7 Address Controller Test\r\n\r\n7,0>;    AC Initialization\r\n\r\n7,0>;    AC DTAG Init\r\n\r\n7,0>;Board 7 Dual Tags Test\r\n\r\n7,0>;    AC DTAG Init\r\n\r\n7,0>;Board 7 FireHose Controller Test\r\n\r\n7,0>;    FHC Initialization\r\n\r\n7,0>;Board 7 JTAG Test\r\n\r\n7,0>;    Verify System Board Scan Ring\r\n\r\n7,0>;Board 7 Centerplane Test\r\n\r\n7,0>;    Centerplane Join\r\n\r\n7,0>;Setting JTAG Master\r\n\r\n7,0>;Clear JTAG Master\r\n\r\n7,0>;Board 7 Setup Cache Size Test\r\n\r\n7,0>;    Setting Up Cache Size\r\n\r\n7,0>;Board 7 System Master Select Test\r\n\r\n7,0>;    Setting System Master\r\n\r\n7,0>OST Master Selected (JTAG,CENTRAL)\r\n\r\n7,0>;Board 16 Clock Board Test\r\n\r\n7,0>;    Clock Board Initialization\r\n\r\n7,0>;    Clock Board Temperature Check\r\n\r\n7,0>;Board 16 Clock Board Serial Ports Test\r\n\r\n7,0>;Board 16 NVRAM Devices Test\r\n\r\n7,0>;    M48T59 (TOD) Init\r\n\r\n7,0>;Board 7 System Board Probe  Test\r\n\r\n7,0>;    Probing all CPU/Memory BDA\r\n\r\n7,0>;    Probing System Boards\r\n\r\n7,0>;    Probing CPU Module JTAG Rings\r\n\r\n7,0>;Setting System Clock Frequency\r\n\r\n7,0>;        CPU Module mid 14 Checked in OK (speed code = 7)\r\n\r\n7,0>;        CPU mid 15 Version=00170011.20000507\r\n\r\n7,0>;        CPU Module mid 15 Checked in OK (speed code = 7)\r\n\r\n7,0>;        CPU mid 18 Version=00170011.20000507\r\n\r\n7,0>;        CPU Module mid 18 Checked in OK (speed code = 7)\r\n\r\n7,0>;        CPU mid 19 Version=00170011.20000507\r\n\r\n7,0>;        CPU Module mid 19 Checked in OK (speed code = 7)\r\n\r\n7,0>;System Frequency (MHz),fcpu=336, fmod=168, fsys=84, fgen=336\r\n\r\n7,0>;TESTING BOARD 1\r\n\r\n7,0>;Board 1 JTAG Test\r\n\r\n7,0>;    Verify System Board Scan Ring\r\n\r\n7,0>;Board 1 Centerplane Test\r\n\r\n7,0>;    Centerplane Check\r\n\r\n7,0>;Board 1 Address Controller Test\r\n\r\n7,0>;    AC Initialization\r\n\r\n7,0>;Setting Freq to 25MHZ\r\n\r\n7,0>;    AC DTAG Init\r\n\r\n7,0>;Board 1 FireHose Controller Test\r\n\r\n7,0>;    FHC Initialization\r\n\r\n7,0>;Board 1 NVRAM Devices Test\r\n\r\n7,0>;    M48T59 (TOD) Init\r\n\r\n7,0>;TESTING BOARD 3\r\n\r\n7,0>;Board 3 JTAG Test\r\n\r\n7,0>;    Verify System Board Scan Ring\r\n\r\n7,0>;Board 3 Centerplane Test\r\n\r\n7,0>;    Centerplane Check\r\n\r\n7,0>;Board 3 Address Controller Test\r\n\r\n7,0>;    AC Initialization\r\n\r\n7,0>;Setting Freq to 33MHZ\r\n\r\n7,0>;    AC DTAG Init\r\n\r\n7,0>;Board 3 FireHose Controller Test\r\n\r\n7,0>;    FHC Initialization\r\n\r\n7,0>;Board 3 NVRAM Devices Test\r\n\r\n7,0>;    M48T59 (TOD) Init\r\n\r\n7,0>;Re-mapping to Local Device Space\r\n\r\n7,0>;Begin Central Space Serial Port access\r\n\r\n7,0>;Enable AC Control Parity\r\n\r\n7,0>;Hotplug Trigger Test\r\n\r\n7,0>;Init Counters for Hotplug\r\n\r\n7,0>;Board 7 Cross Calls Test\r\n\r\n7,0>;Board 7 Environmental Probe Test\r\n\r\n7,0>;    Environmental Probe\r\n\r\n7,0>;Checking Power Supply Configuration\r\n\r\n7,0>ower is more than adequate, load 4 ps 3\r\n\r\n7,0>;Use existing memory configuraton \r\n\r\n7,0>;TESTING IO BOARD 1\r\n\r\n7,0>;Board 1 I/O FPROM Test\r\n\r\n7,0>;@(#) iPOST 3.4.8 1998/10/27 12:24\r\n\r\n7,0>; TESTING IO BOARD 1 ASICs\r\n\r\n7,0>; TESTING SysIO Port 0\r\n\r\n7,0>;Board 1 SysIO Registers Test\r\n\r\n7,0>;    SysIO Register Initialization\r\n\r\n7,0>;    SysIO RAM Initialization\r\n\r\n7,0>;Board 1 SysIO Functional Test\r\n\r\n7,0>;    Clear Interrupt Map and State Registers\r\n\r\n7,0>;Board 1 OnBoard IO Chipset (SOC) Test\r\n\r\n7,0>; TESTING SysIO Port 1\r\n\r\n7,0>;Board 1 SysIO Registers Test\r\n\r\n7,0>;    SysIO Register Initialization\r\n\r\n7,0>;    SysIO RAM Initialization\r\n\r\n7,0>;Board 1 SysIO Functional Test\r\n\r\n7,0>;    Clear Interrupt Map and State Registers\r\n\r\n7,0>;Board 1 OnBoard IO Chipset (FEPS) Test\r\n\r\n7,0>;IO BOARD 1 TESTED\r\n\r\n7,0>;TESTING IO BOARD 3\r\n\r\n7,0>;Board 3 I/O FPROM Test\r\n\r\n7,0>;@(#) iPOST 3.0.2 1997/05/01 10:56\r\n\r\n7,0>; TESTING IO BOARD 3 ASICs\r\n\r\n7,0>; TESTING Psycho Port 0\r\n\r\n7,0>;Board 3 Psycho Basic Test\r\n\r\n7,0>;Board 3 Psycho Functional Test\r\n\r\n7,0>;    Init Psycho\r\n\r\n7,0>;Board 3 Psycho Error Test\r\n\r\n7,0>;    Init Psycho\r\n\r\n7,0>;Board 3 OnBoard IO Chipset (Cheerio) Test\r\n\r\n7,0>;    Init Cheerio\r\n\r\n7,0>; TESTING PSYCHO Port 1\r\n\r\n7,0>;Board 3 Psycho Basic Test\r\n\r\n7,0>;Board 3 Psycho Functional Test\r\n\r\n7,0>;    Init Psycho\r\n\r\n7,0>;Board 3 Psycho Error Test\r\n\r\n7,0>;    Init Psycho\r\n\r\n7,0>;Board 3 OnBoard IO Chipset (ISP1040) Test\r\n\r\n7,0>;    ISP PCI Configuration Space Validation\r\n\r\n7,0>;IO BOARD 3 TESTED\r\n\r\n7,0>robing for Disk System boards\r\n\r\n7,0>;Board 7 System Interrupts Test\r\n\r\n7,0>;\r\n\r\n7,0>;        System Board Status\r\n\r\n7,0>;-----------------------------------------------------------------\r\n\r\n7,0>; Slot   Board Status     Board Type      Failures\r\n\r\n7,0>;-----------------------------------------------------------------\r\n\r\n7,0>;  0  | Not installed  |             |\r\n\r\n7,0>;  1  | Normal         |+IO Type 4   |\r\n\r\n7,0>;  2  | Not installed  |             |\r\n\r\n7,0>;  3  | Normal         |+IO Type 3   |\r\n\r\n7,0>;  4  | Not installed  |             |\r\n\r\n7,0>;  5  | Not installed  |             |\r\n\r\n7,0>;  6  | Not installed  |             |\r\n\r\n7,0>;  7  | Normal         |+CPU/Memory  |\r\n\r\n7,0>;  8  | Not installed  |             |\r\n\r\n7,0>;  9  | Normal         |+CPU/Memory  |\r\n\r\n7,0>; 16  | Normal         | Clock Board |\r\n\r\n7,0>;-----------------------------------------------------------------\r\n\r\n7,0>;\r\n\r\n7,0>;        CPU Module Status\r\n\r\n7,0>;-----------------------------------------------------------------\r\n\r\n7,0>; MID  OK  Cache  Speed   Version\r\n\r\n7,0>;-----------------------------------------------------------------\r\n\r\n7,0>; 14 | y | 4096  |  336  | 00170011.20000507\r\n\r\n7,0>; 15 | y | 4096  |  336  | 00170011.20000507\r\n\r\n7,0>; 18 | y | 4096  |  336  | 00170011.20000507\r\n\r\n7,0>; 19 | y | 4096  |  336  | 00170011.20000507\r\n\r\n7,0>;-----------------------------------------------------------------\r\n\r\n7,0>;System Frequency (MHz),fcpu=336, fmod=168, fsys=84, fgen=336\r\n\r\n7,0>;        Populated Memory Bank Status\r\n\r\n7,0>;                bd #        Size        Address        Way        Status\r\n\r\n7,0>;                7        256        0        4        Normal\r\n\r\n7,0>;                7        256        2        4        Normal\r\n\r\n7,0>;                9        256        1        4        Normal\r\n\r\n7,0>;                9        256        3        4        Normal\r\n\r\n7,0>;\r\n\r\n7,0>;\r\n\r\n        POST COMPLETE\r\n\r\n7,0>;Entering OBP\r\n\r\n\r\nSwitching to high addresses \r\n\r\nSetting up TLBs Done\r\nMMU ON\r\nPC = 0000.01ff.f000.1ea8\r\nPC = 0000.0000.0000.1f14\r\nDecompressing in Memory Done\r\nSize = 0000.0000.0007.00c0\r\nttya initialized\r\nUsing POST\'s System Configuration\r\nSetting up memory\r\nStarting CPU ID 15 \r\nStarting CPU ID 18 \r\nStarting CPU ID 19 \r\nClock board TOD does not match TOD on any IO board.\r\nfhc\r\n＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝

iricyan

你真背呀，不过你会增长很多经验。\r\n\r\n好端端的做了什么需要reboot呢？\r\n\r\n去掉自动挂接，先能正常进入系统再说了。\r\n\r\nfsck -y也危险的，我看你挂接的是datadg，应该有东西删除到了lost＋found了，最好不要丢数据。

2004秋

该怎么办啊，各位帮帮忙啊！

Philmoon

fsck一下这个/dev/vx/rdsk/datadg/vol02了，那些问题只能答“yes”的。如果恢复不出来又没备份的话可就惨了。

ma_hu

fsck -y /  \r\n然后 reboot -- -s\r\n启动到单用户状态，把  datadg  的自动挂接去掉；然后再重新启动，手动挂接 datadg  如果能成功就立即备份数据；如果一定要 fsck 的话，先问一下你跑的什么应用。如果应用很关键，就最好找SUN或者VERITAS的人来搞。兄弟你别当炮灰。另外，千万记得编辑你的 /etc/vfstab 给你所有重要的文件系统加上 logging !!!