Memory Addressing （五）

thomas_ar

Fast Access to Segment Descriptors
We recall that logical addresses consist of a 16-bit Segment Selector and a 32-bit Offset, and that segmentation registers store only the Segment Selector.

回忆一下：逻辑地址由一个16bit的段选择子和一个32bit的偏移组成，段寄存器仅存放段选择子。
To speed up the translation of logical addresses into linear addresses, the 80x86 processor provides an additional nonprogrammable register that is, a register that cannot be set by a programmer for each of the six programmable segmentation registers. Each nonprogrammable register contains the 8-byte Segment Descriptor (described in the previous section) specified by the Segment Selector contained in the corresponding segmentation register. Every time a Segment Selector is loaded in a segmentation register, the corresponding Segment Descriptor is loaded from memory into the matching nonprogrammable CPU register. From then on, translations of logical addresses referring to that segment can be performed without accessing the GDT or LDT stored in main memory; the processor can refer only directly to the CPU register containing the Segment Descriptor. Accesses to the GDT or LDT are necessary only when the contents of the segmentation registers change (see Figure 2-4).

为了加速逻辑地址到线性地址的转换，x86为每个可编程的段寄存器提供了一个相应的不可编程的寄存器，这就是所谓的影子寄存器。每个不可编程的寄存器包含对应段寄存器中段选择子对应的8byte段描述项。每当段选择子被装入段寄存器，相应的段描述项也从内存装入对应的那个影子寄存器。从此，该段的逻辑地址的转换就不再需要访问GDT或LDT了，处理器可以直接使用存放在影子寄存器中的段描述项。只有当段寄存器的内容改变时，才会去访问GDT或LDT。
Any Segment Selector includes three fields that are described in Table 2-2.
Table 2-2. Segment Selector fields
Field name
Description
index
Identifies the Segment Descriptor entry contained in the GDT or in the LDT (described further in the text following this table).
就是数组GDT/LDT的下标
TI
Table Indicator : specifies whether the Segment Descriptor is included in the GDT (TI = 0) or in the LDT (TI = 1).
指明使用GDT还是LDT
RPL
Requestor Privilege Level : specifies the Current Privilege Level of the CPU when the corresponding Segment Selector is loaded into the cs register; it also may be used to selectively weaken the processor privilege level when accessing data segments (see Intel documentation for details).

Because a Segment Descriptor is 8 bytes long, its relative address inside the GDT or the LDT is obtained by multiplying the 13-bit index field of the Segment Selector by 8. For instance, if the GDT is at 0x00020000 (the value stored in the gdtr register) and the index specified by the Segment Selector is 2, the address of the corresponding Segment Descriptor is 0x00020000 + (2 x 8), or 0x00020010.

因为一个段描述项有8byte长，所以它在GDT/LDT中的相对位置等于13bit的下标乘以8。比如，如果GDT位于0x00020000（该值存放在gdtr寄存器内）并且段选择子中的index为2，那么对应的段描述项的首地址位于0x00020000+(2*8)=0x00020010.
The first entry of the GDT is always set to 0. This ensures that logical addresses with a null Segment Selector will be considered invalid, thus causing a processor exception. The maximum number of Segment Descriptors that can be stored in the GDT is 8,191 (i.e., 213-1).
GDT表的第一个项总是设为0。这保证了以空段选择子的逻辑地址被认为无效，会引起处理器异常。存放在GDT中的段描述项最多为8,192(2^13–1)。


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