armv7 的非secure world能不能使用FIQ

amarant

看到手册里面说，FIQ是给secure world专用的。那么通过把GIC中相关的一个中断（例如某个SGI）配置成FIQ模式，当该中断发生的时候，kernel能看到这个中断吗？
其实我就是想知道arm的fiq_debugger能不能在v7以上的CPU使用？
@arm-linux-gcc

arm-linux-gcc

armv7的FIQ可以在non-secure world使用吧，gic的ID28就是FIQ啊
在上一家公司的时候，经常有芯片公司的人来给我们培训，有一次某公司就讲到他们把FIQ用起来了（作为nmi-watchdog），他们的cpu是cortex-a7的，linux是跑在non secure world的

我只记得只有monitor模式下才对fiq有限制，必须打开SCR.FIQ才能够在monitor模式时收到fiq中断


你是看的那个文档？原文是怎么说的呢？

amarant

回复 2# arm-linux-gcc


    嗯，应该是可以的。我看的那句话应该是有前提的。看的文档是arm给我司的培训资料。我现在也是准备搞的debugger，一种方法就是你说的nmi-watchdog，还有一种方法就是把ipi配置成fiq。明天去公司看看arm官方gic文档有没有相关的话。

amarant

ARM Generic Interrupt Controller Architecture 1.2节：

1.2
Security Extensions support
The ARM processor Security Extensions are an optional extension to the ARMv7-A architecture profile. This
means it is IMPLEMENTATION DEFINED whether an ARMv7-A implementation includes the Security Extensions. The
ARM Security Extensions facilitate the development of secure applications by:
•
integrating hardware security features into the architecture
•
providing Secure virtual memory space that is accessed by memory accesses in the Secure state
•
providing Non-secure virtual memory space that is accessed by memory accesses in the Non-secure state.
See Processor security state and Secure and Non-secure GIC accesses on page 1-20 for more information.
When a GIC that implements the GIC Security Extensions is connected to a processor that implements the ARM
Security Extensions:
•
Group 0 interrupts are Secure interrupts, and Group 1 interrupts are Non-secure interrupts.
•
The behavior of processor accesses to registers in the GIC depends on whether the access is Secure or
Non-secure, see Processor security state and Secure and Non-secure GIC accesses on page 1-20.
Except where this document explicitly indicates otherwise, when accessing GIC registers:
—
a Non-secure read of a register field holding state information for a Secure interrupt returns zero
—
the GIC ignores any Non-secure write to a register field holding state information for a Secure
interrupt.
Non-secure accesses can only read or write information corresponding to Non-secure interrupts. Secure
accesses can read or write information corresponding to both Non-secure and Secure interrupts.
•
Secure system software individually defines each implemented interrupt as either Secure or Non-secure.
•
A Non-secure interrupt signals an IRQ interrupt request to a target processor.
•
A Secure interrupt can signal either an IRQ or an FIQ interrupt request to a target processor.
•
Secure software can manage interrupt sources securely without the possibility of interference from
Non-secure software. See Controlling Secure and Non-secure interrupts independently on page 3-69 for
more information.

回复 2# arm-linux-gcc