HP A5183A a180小型机配件促销

牛年0000

CPU
•        A180: PA-7300LC 180MHz with 64/64KB on-chip I/D L1 cache
•        A180C: PA-7300LC 180MHz with 64/64KB on-chip I/D L1 and 1MB off-chip unified L2 cache
The additional 1MB L2 cache is the only difference between both systems.
This cache is upgradeable through two DIMM slots near the CPU.
Chipset
•        LASI ASIC, which features:
o        NCR 53C710 8-bit single-ended SCSI-2
o        Intel 82596CA 10Mb Ethernet controller
o        NS 16550A compatible serial
•        Dino GSC-to-PCI bridge
•        Phantom PseudoBC GSC+ port
•        DEC 21142/43 10/100BaseT PCI Ethernet
» View a system-level ASCII-illustration of the chipset.
Buses
•        GSC+ general system-level I/O bus (probably clocked at 36MHz — 144MB/s peak data rate)
•        PCI high performance device I/O bus
•        SCSI-2 Fast-Narrow single-ended; main storage I/O bus
Memory
•        72-pin ECC EDO SIMMs, 60ns or faster.
•        Takes 64-256MB modules
•        Eight slots
•        128MB (2×64) minimum, 2048MB (8×256) maximum
Expansion
•        Two slots for either GSC (EISA formfactor) or PCI cards
•        See GSC expansion-cards
Drives
•        One tray for two 3.5″ Fast-Narrow 50-pin SCSI hard drives
External Connectors
•        50-pin HD SCSI-2 single-ended
•        DB9 male RS232C serial
•        TP/RJ45 10/100Mbit Ethernet
•        TP/RJ45 10Mbit Ethernet Web Console
References:
•        A180 User’s ManualLink 1 (PDF, 0.9MB)
ROM update
There is a firmware update available for the A180[C], which contains the latest version (39.32).
•        PF_CSTD3932.txtLink 2 has details about the contents and installation of the patch.
•        PF_CSTD3932Link 3 contains the patch.
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