libata reading notes - 1 NCQ

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                NCQ (native command queuing)
NCQ is a command protocol in SATA that allows multiple commands to be
outstanding within a drive at the same time. Drives that support NCQ
have an internal queue where outstanding commands can be dynamically
rescheduled or re-ordered, along with the necessary tracking mechanisms
for outstanding and completed portions of the workload. NCQ also has a
mechanism that allow the host to issue additional commands to the driver
while the driver is seeking for data for another command.
Due to the mechanical part of a hard drive, the seek latencies and
rotational latencies affect drive performance most.
The best known algorithm to minimize both seek and rotational latencies
is called Rotational Position Ordering. RPO considers the rotational
position of the disk as well as the seek distance when considering the
order to execute commands. Commands are executed in an order that
results in the shortest overall access time, the combined seek and
rotational latency time, to increase performance.
NCQ allows a driver to take advantage of RPO to optimally re-order
commands to maxmize performance.
3 new capabilities built into SATA to enhance NCQ performance:
Race-free status return mechanism
interrupt aggregation
First Party DMA (FPDMA)
building a queue in drive:
NCQ command: Read FPDMA Queued & Write FPDMA Queued
NCQ command is issued just like any other command, the difference
between queued and non-queued commands is what happens after the command
is issued.
For a non-queued command, the drive would transfer the data for that
command and then clear the BSY bit in the status register to tell the
host that the command was completed. Host can't issue new command to the
driver only after the BSY bit is clear.
When a queued command is issued, the drive will clear BSY immediately,
before any data is transferred to the host. In queuing, the BSY bit is
not used to convey command completion. As soon as the BSY is cleared,
the host can issue another queued command to the drive. In this way a
queue of commands can be built within the drive.
transferring data:
NCQ uses FPDMA to transfer data between drive and host. FPDMA allows the
drive to have control over programming the DMA engine for a data
transfer. The drive then can select the next data transfer to minimize
both seek and rotational latencies.
Drive issues a DMA Setup FIS to the host, the host setup the DMA engine
according the command tag in DMA Setup FIS (mainly the DMA address for
system memory).
status return:
The host and the drive use the SActive register to communicate the
command completion status. Each bit in SActive is corresponding to a
command tag. A bit is set in SActive, it means a command with that tag
is outstanding in the drive.
The host set bits in the SActive register when issuing commands to the
drive, while the drive clear bits in SActive to tell the host which
command is finished.
The drive uses SDB(Set Device Bits) FIS to clear bits in SActive. When a
bit is set in the SActive field of the FIS, it means the command with
the corresponding tag has completed successfully. The host will clear
bits in SActive corresponding to the bits set in the SActive field of a
received SDB FIS.
SDB FIS can convey that multiple commands have completed at the same
time. This ensures the host will only receive one interrupt for multiple
command completions.
There is not much work in driver to support NCQ.
1. probe the ata device to determine if it supports NCQ
ata_bus_probe
    ata_dev_read_id
    read the id string from the enabled ata device, it contains all
    the capability info about this device
    ata_dev_configure -> ata_dev_config_ncq
    if the device has ncq (ata_id_has_ncq), and the host also
    support ncq, then the driver will use NCQ to read/write with this
    ata device.
2. use ATA_CMD_FPDMA_READ/WRITE when constructing the read/write command
ata_build_rw_tf
3. when issuing command to the host controller (ahci), need to set the
bit in SActive register (PORT_SCR_ACT). And in interrupt service routine
for this ata port, reading PORT_SCR_ACT (for non-queued command, read
PORT_CMD_ISSUE instead)to determine which commands are finished
(see ahci_port_intr and ata_qc_complete_multiple).
reference:
1. Intel: Serial ATA Advanced Host Controller Interface specification
2. Intel and Seagate: Serial ATA Native Command Queuing an exciting new
   performances feature for Serial ATA
3. www.sata-io.org: Serial ATA Revision 2.6 specification
4. Linux kernel source code /driver/ata/
               
               
               
               
               

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