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SC Alert: Input power unavailable for PSU @ PS1.
SC Alert: Input power unavailable for PSU @ PS0.
ALOM - Could not get all data from I2C - min post, no power on
ALOM - Could not get diag-switch from I2C
ALOM BOOTMON
ALOM Build Release: 001
Reset register: e0000000 EHRS ESRS LLRS
ALOM POST 1.0
Dual Port Memory Test, PASSED.
TTY External - Internal Loopback Test
TTY External - Internal Loopback Test, PASSED.
TTYC - Internal Loopback Test
TTYC - Internal Loopback Test, PASSED.
TTYD - Internal Loopback Test
TTYD - Internal Loopback Test, PASSED.
Memory Data Lines Test
Memory Data Lines Test, PASSED.
Memory Address Lines Test
Slide address bits to test open address lines
Test for shorted address lines
Memory Address Lines
Memory Parity Test
Memory Parity Test, PASSED.
Boot Sector FLASH CRC Test
Boot Sector FLASH CRC Test, PASSED.
Return to Boot Monitor for Handshake
ALOM POST 1.0
Status = 00007fff
Returned from Boot Monitor and Handshake
Instruction CACHE Test
DISABLE the I-CACHE
ENABLE the I-CACHE
Verify I-CACHE Performance Increase
Instruction CACHE Test, PASSED.
Memory Cells Test
Counting UP: Write data: 00000000
Counting DOWN: Read - Verify - Write data: ffffffff
Counting UP: Read - Verify - Write da
Counting DOWN: Read - Verify - Write data: aa33cc66
Counting UP: Read - Verify - Write data: 33cc6699
Counting DOWN: Read - Verify - Write data: cc669955
Counting UP: Read - Verify - Write data: 669955aa
Counting DOWN: Read - Verify - Write data: 9955aa33
Counting UP: Read - Verify - Write data: f0f0f0f0
Memory Cells Test, PASSED.
Data CACHE Test
Verify D-CACHE Performance Increase
D-CACHE Performance Increase I-CACHE Disabled
D-CACHE Performance Increase I-CACHE Enabled
Verify D-CACHE Memory
Data CACHE Test, PASSED.
Main Sectors FLASH CRC Test
Main Sectors FLASH CRC Test, PASSED.
Loading the runtime image...
Sun(tm) Advanced Lights Out Manager 1.6.5 (CAServer)
SC Alert: SC System booted.
Full VxDiag Tests
BASIC TOD TEST
Read the TOD Clock: TUE MAR 22 08:12:38 2011
Wait, 1 - 3 seconds
Read the TOD Clock: TUE MAR 22 08:12:40 2011
BASIC TOD TEST, PASSED
ETHERNET CPU LOOPBACK TEST
50 BYTE PACKET - a 0 in field of 1's. Attaching network interface cpm0...
one.
50 BYTE PACKET - a 1 in field of 0's.
900 BYTE PACKET - pseudo-random data.
ETHERNET CPU LOOPBACK TEST, PASSED
Full VxDiag Tests - PASSED
Status summary - Status = 7FFF
VxDiag - - PASSED
POST - - PASSED
LOOPBACK - - PASSED
I2C - - PASSED
EPROM - - PASSED
FRU PROM - - PASSED
ETHERNET - - PASSED
MAIN CRC - - PASSED
BOOT CRC -
TTYD - - PASSED
TTYC - - PASSED
MEMORY - - PASSED
MPC850 - - PASSED
Enter #. to return to ALOM.
0>....
0>Send MC Timing CPU 1
0>Init Memory.....
0>Probe Dimms
1>Probe Dimms
1>Init Mem Controller Regs
0>Init Mem Controller Regs
1>Set JBUS config reg
0>Set JBUS config reg
0>IO-Bridge unit 0 init test
0>IO-Bridge unit 1 init test
0>Do PLL reset
0>Setting timing to 9:1 12:1, system frequency 177 MHz, CPU frequency 1593 MHz
SC Alert: Host System has Reset
0>Soft Power-on RST thru SW
0>PLL Reset.....
0>Init SB
0>Initialize I2C Controller
0>Init CPU
0>Init mmu regs
0>Setup L2 Cache
0>L2 Cache Control = 00000000.00f04400
0> Size = 00000000.00100000...
0>Setup and Enable DMMU
0>Setup DMMU Miss Handler
0>Scrub Mailbox
0>Timing is 9:1 12:1, sys 177 MHz, CPU 1593 MHz, mem 132 MHz.
0> UltraSPARC[TM] IIIi, Version 3.4
1>Init CPU
1> UltraSPARC[TM] IIIi, Version 3.4
1>Init mmu regs
1>Setup L2 Cache
1>L2 Cache Control = 00000000.00f
1> Size = 00000000.00100000...
1>Setup and Enable DMMU
1>Setup DMMU Miss Handler
1>Scrub Mailbox
1>Timing is 9:1 12:1, sys 177 MHz, CPU 1593 MHz, mem 132 MHz.
0>Init Memory.....
0>Probe Dimms
1>Probe Dimms
1>Init Mem Controller Sequence
0>Init Mem Controller Sequence
0>IO-Bridge unit 0 init test
SC Alert: Correct SCC not replaced - shutting managed system down.
SC Alert: SC Request to Power Off Host Immediately.
0>IO-Bridge unit 1 init test
0>Test Memory.....
SC Alert: System poweron is disabled.
这是我从SUNV440开机拷出来的日志,请各位大大门帮我看看这是什么问题?情况就是到这一步就直接电源断掉了。 |
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