Medfield 平台 I2C 驱动配置

xxha000721

medfield 平台中，i2c总线，通过pci总线来配置。
代码位于： /drivers/i2c/busses/i2c-designware-pcidrv.c 中

首先是pci 设备表：

1. static struct dw_pci_controller dw_pci_controllers[] = {
   
2.     [moorestown_0] = {
   
3.         .bus_num = 0,
   
4.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
   
5.         .tx_fifo_depth = 32,
   
6.         .rx_fifo_depth = 32,
   
7.         .clk_khz = 25000,
   
8.     },
   
9.     [moorestown_1] = {
   
10.         .bus_num = 1,
    
11.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
12.         .tx_fifo_depth = 32,
    
13.         .rx_fifo_depth = 32,
    
14.         .clk_khz = 25000,
    
15.     },
    
16.     [moorestown_2] = {
    
17.         .bus_num = 2,
    
18.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
19.         .tx_fifo_depth = 32,
    
20.         .rx_fifo_depth = 32,
    
21.         .clk_khz = 25000,
    
22.     },
    
23. #ifdef FIXME_MLD // DV0.9 changes to match the GB tree
    
24.     [medfield_0] = {
    
25.         .bus_num = 0,
    
26.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
27.         .tx_fifo_depth = 32,
    
28.         .rx_fifo_depth = 32,
    
29.         .clk_khz = 25000,
    
30.     },
    
31.     [medfield_1] = {
    
32.         .bus_num = 1,
    
33.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
34.         .tx_fifo_depth = 32,
    
35.         .rx_fifo_depth = 32,
    
36.         .clk_khz = 25000,
    
37.     },
    
38.     [medfield_2] = {
    
39.         .bus_num = 2,
    
40.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
41.         .tx_fifo_depth = 32,
    
42.         .rx_fifo_depth = 32,
    
43.         .clk_khz = 25000,
    
44.     },
    
45.     [medfield_3] = {
    
46.         .bus_num = 3,
    
47.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
    
48.         .tx_fifo_depth = 32,
    
49.        .rx_fifo_depth = 32,
    
50.         .clk_khz = 25000,
    
51.     },
    
52.     [medfield_4] = {
    
53.         .bus_num = 4,
    
54.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
55.         .tx_fifo_depth = 32,
    
56.         .rx_fifo_depth = 32,
    
57.         .clk_khz = 25000,
    
58.     },
    
59.     [medfield_5] = {
    
60.         .bus_num = 5,
    
61.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
62.         .tx_fifo_depth = 32,
    
63.         .rx_fifo_depth = 32,
    
64.         .clk_khz = 25000,
    
65.     },
    
66. #else
    
67.     [medfield_0] = {
    
68.         .bus_num = 0,
    
69.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
    
70.         .tx_fifo_depth = 32,
    
71.         .rx_fifo_depth = 32,
    
72.         .clk_khz = 17000,
    
73.     },
    
74.     [medfield_1] = {
    
75.         .bus_num = 1,
    
76.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
77.         .tx_fifo_depth = 32,
    
78.         .rx_fifo_depth = 32,
    
79.         .clk_khz = 25000,
    
80.     },
    
81.     [medfield_2] = {
    
82.         .bus_num = 2,
    
83.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
84.         .tx_fifo_depth = 32,
    
85.         .rx_fifo_depth = 32,
    
86.         .clk_khz = 25000,
    
87.     },
    
88.     [medfield_3] = {
    
89.         .bus_num = 3,
    
90.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
    
91.         .tx_fifo_depth = 32,
    
92.         .rx_fifo_depth = 32,
    
93.         .clk_khz = 25000,
    
94.    },
    
95.     [medfield_4] = {
    
96.         .bus_num = 4,
    
97.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
    
98.         .tx_fifo_depth = 32,
    
99.         .rx_fifo_depth = 32,
    
100.         .clk_khz = 25000,
     
101.     },
     
102.     [medfield_5] = {
     
103.         .bus_num = 5,
     
104.         .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
     
105.         .tx_fifo_depth = 32,
     
106.         .rx_fifo_depth = 32,
     
107.         .clk_khz = 25000,
     
108.     },
     
109. #endif
     
110. };

代码开始，注册PCI 驱动：

1. static int __init dw_i2c_init_driver(void)
   
2. {
   
3.     return pci_register_driver(&dw_i2c_driver);  //把dw_i2c_driver 注册进pci总线。
   
4. }
   
5. module_init(dw_i2c_init_driver);
   
6. 
   
7. static void __exit dw_i2c_exit_driver(void)
   
8. {
   
9.     pci_unregister_driver(&dw_i2c_driver);
   
10. }
    
11. module_exit(dw_i2c_exit_driver);
    
12. 
    
13. MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
    
14. MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
    
15. MODULE_LICENSE("GPL");

dw_i2c_driver 内容：

1. static struct pci_driver dw_i2c_driver = {
   
2.     .name = DRIVER_NAME,
   
3.     .id_table = i2_designware_pci_ids,
   
4.     .probe = i2c_dw_pci_probe,
   
5.     .remove = __devexit_p(i2c_dw_pci_remove),
   
6.     .driver = {
   
7.         .pm = &i2c_dw_pm_ops,
   
8.     },
   
9. };

1. DRIVER_NAME:

1. #define DRIVER_NAME "i2c-designware-pci"

2. i2_designware_pci_ids:  pci的设备表。

1. DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = {
   
2.     /* Moorestown */
   
3.     { PCI_VDEVICE(INTEL, 0x0802), moorestown_0 },
   
4.     { PCI_VDEVICE(INTEL, 0x0803), moorestown_1 },
   
5.     { PCI_VDEVICE(INTEL, 0x0804), moorestown_2 },
   
6.     /* Medfield */
   
7.     { PCI_VDEVICE(INTEL, 0x0817), medfield_3,},
   
8.     { PCI_VDEVICE(INTEL, 0x0818), medfield_4 },
   
9.     { PCI_VDEVICE(INTEL, 0x0819), medfield_5 },
   
10.     { PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
    
11.     { PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
    
12.     { PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
    
13.     { 0,}
    
14. };
    
15. MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);

3. i2c_dw_pci_probe

1. static int __devinit i2c_dw_pci_probe(struct pci_dev *pdev,
   
2. const struct pci_device_id *id)
   
3. {
   
4.     struct dw_i2c_dev *dev;
   
5.     struct i2c_adapter *adap;
   
6.     unsigned long start, len;
   
7.     void __iomem *base;
   
8.     int r;
   
9.     struct dw_pci_controller *controller;
   
10. 
    
11.     if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
    
12.         printk(KERN_ERR "dw_i2c_pci_probe: invalid driver data %ld\n",
    
13.             id->driver_data);
    
14.         return -EINVAL;
    
15.     }
    
16. 
    
17.     controller = &dw_pci_controllers[id->driver_data];
    
18. 
    
19.     r = pci_enable_device(pdev);
    
20.     if (r) {
    
21.         dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
    
22.             r);
    
23.         goto exit;
    
24.     }
    
25. 
    
26.     /* Determine the address of the I2C area */
    
27.     start = pci_resource_start(pdev, 0);
    
28.     len = pci_resource_len(pdev, 0);
    
29.     if (!start || len == 0) {
    
30.         dev_err(&pdev->dev, "base address not set\n");
    
31.         r = -ENODEV;
    
32.         goto exit;
    
33.     }
    
34. 
    
35.     r = pci_request_region(pdev, 0, DRIVER_NAME);
    
36.     if (r) {
    
37.         dev_err(&pdev->dev, "failed to request I2C region "
    
38.             "0x%lx-0x%lx\n", start,
    
39.             (unsigned long)pci_resource_end(pdev, 0));
    
40.         goto exit;
    
41.     }
    
42. 
    
43.     base = ioremap_nocache(start, len);
    
44.     if (!base) {
    
45.         dev_err(&pdev->dev, "I/O memory remapping failed\n");
    
46.         r = -ENOMEM;
    
47.         goto err_release_region;
    
48.     }
    
49. 
    
50. 
    
51.     dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL);

4. i2c_dw_pm_ops :

1. static const struct dev_pm_ops i2c_dw_pm_ops = {
   
2.     .resume = i2c_dw_pci_resume,
   
3.     .suspend = i2c_dw_pci_suspend,
   
4.     SET_RUNTIME_PM_OPS(i2c_dw_pci_suspend,
   
5.             i2c_dw_pci_resume,
   
6.             i2c_dw_pci_runtime_idle)
   
7. };