N240配上X7296A显卡后传感器MB/P0错误(不解中)

dongzengyin

不插显卡没问题 插上就报错 机器自己死掉 显卡是好的 启动信息和 系统信息如下 有人见过吗\r\nSC Alert: Host system has shut down.\r\n\r\nSC Alert: CRITICAL ALARM is set\r\n\r\nALOM BOOTMON v1.5.4\r\nALOM Build Release: 008\r\nReset register: e0000000 EHRS ESRS LLRS\r\n\r\n\r\nALOM POST 1.0\r\n\r\n\r\nDual Port Memory Test, PASSED.\r\n\r\nTTY External - Internal Loopback Test\r\nTTY External - Internal Loopback Test, PASSED.\r\n\r\nTTYC - Internal Loopback Test\r\nTTYC - Internal Loopback Test, PASSED.\r\n\r\nTTYD - Internal Loopback Test\r\nTTYD - Internal Loopback Test, PASSED.\r\n\r\nMemory Data Lines Test\r\nMemory Data Lines Test, PASSED.\r\n\r\nMemory Address Lines Test\r\n  Slide address bits to test open address lines\r\n  Test for shorted address lines\r\nMemory Address Lines Test, PASSED.\r\n\r\nMemory Parity Test\r\nMemory Parity Test, PASSED.\r\n\r\nBoot Sector FLASH CRC Test\r\nBoot Sector FLASH CRC Test, PASSED.\r\n\r\n\r\n\r\nReturn to Boot Monitor for Handshake  \r\nALOM POST 1.0\r\n   Status = 00007fff\r\n\r\nReturned from Boot Monitor and Handshake\r\n\r\n\r\n\r\nClearing Memory Cells\r\nMemory Clean Complete\r\n\r\n\r\nLoading the runtime image... \r\nSC Alert: CRITICAL ALARM is set\r\n\r\nSC Alert: SC System booted.\r\n\r\nSC Alert: Host System has Reset\r\n\r\nSC Alert: CRITICAL ALARM is set\r\n\r\n\r\nSun(tm) Advanced Lights Out Manager 1.5.4 (unknown)\r\n\r\n\r\n\r\nFull VxDiag Tests\r\n\r\nBASIC TOD TEST\r\n  Read the TOD Clock:        TUE APR 17 04:13:47 2007\r\n  Wait, 1 - 3 seconds        \r\n  Read the TOD Clock:        TUE APR 17 04:13:49 2007\r\nBASIC TOD TEST, PASSED\r\n\r\nETHERNET CPU LOOPBACK TEST\r\n  50 BYTE PACKET   - a 0 in field of 1\'s.  \r\n  50 BYTE PACKET   - a 1 in field of 0\'s.  \r\n  900 BYTE PACKET  - pseudo-random data.  \r\nETHERNET CPU LOOPBACK TEST, PASSED\r\n\r\nFull VxDiag Tests - PASSED\r\n\r\n\r\n\r\n    Status summary  -  Status = 7FFF\r\n\r\n       VxDiag    -          -  PASSED\r\n       POST      -          -  PASSED\r\n       LOOPBACK  -          -  PASSED\r\n\r\n       I2C       -          -  PASSED\r\n       EPROM     -          -  PASSED\r\n       FRU PROM  -          -  PASSED\r\n\r\n       ETHERNET  -          -  PASSED\r\n       MAIN CRC  -          -  PASSED\r\n       BOOT CRC  -          -  PASSED\r\n\r\n       TTYD      -          -  PASSED\r\n       TTYC      -          -  PASSED\r\n       MEMORY    -          -  PASSED\r\n       MPC850    -          -  PASSED\r\n\r\n\r\nEnter #. to return to ALOM.\r\n0>Scrub and Setup L2 Cache\r\n0>Setup and Enable DMMU\r\n0>Setup DMMU Miss Handler\r\n0>Test  Mailbox\r\n0>Scrub Mailbox\r\n0>CPU Tick and Tick Compare Registers Test\r\n0>CPU Stick and Stick Compare Registers Test\r\n0>Set Timing\r\n0>      UltraSPARC[TM] IIIi, Version 3.4\r\n0>Interrupt Crosscall.....\r\n0>Setup Int Handlers\r\n0>MB:   Part-Dash-Rev#:  3753359-01-05  Serial#:  H00W5N\r\n0>CPU0 MB/P0/B0/D0: \r\n0>Part#:  18VDDT6472G-26AG3   Serial#:  d2056429  Date Code:  0609  Rev#:  0300\r\n0>CPU0 MB/P0/B0/D1: \r\n0>Part#:  18VDDT6472G-26AG3   Serial#:  d2056428  Date Code:  0609  Rev#:  0300\r\n0>CPU0 MB/P0/B1/D0: \r\n0>Part#:  M3 12L2920BG0-CB3   Serial#:  72058ebf  Date Code:  0551  Rev#:  3042\r\n0>CPU0 MB/P0/B1/D1: \r\n0>Part#:  M3 12L2920BG0-CB3   Serial#:  72058ec7  Date Code:  0551  Rev#:  3042\r\n0>Set CPU/System Speed\r\n0>Jumper data = ba \r\n0>..\r\n0>Init Memory.....\r\n0>Probe Dimms\r\n0>Init Mem Controller Regs\r\n0>Set JBUS config reg\r\n0>IO-Bridge unit 0 init test             \r\n0>IO-Bridge unit 1 init test             \r\n0>Do PLL reset\r\n0>Setting timing to 9:1 12:1, system frequency 167 MHz, CPU frequency 1503 MHz\r\n0>Soft Power-on RST thru SW \r\n0>PLL Reset.....\r\n0>Init SB\r\n0>Initialize I2C Controller\r\n0>Init CPU\r\n0>Init mmu regs\r\n0>Setup L2 Cache\r\n0>L2 Cache Control = 00000000.00f04400 \r\n0>      Size = 00000000.00100000...\r\n0>Setup and Enable DMMU\r\n0>Setup DMMU Miss Handler\r\n0>Scrub Mailbox\r\n0>Timing is 9:1 12:1, sys 167 MHz, CPU 1504 MHz, mem 125 MHz.\r\n0>      UltraSPARC[TM] IIIi, Version 3.4\r\n0>Init Memory.....\r\n0>Probe Dimms\r\n0>Init Mem Controller Sequence\r\n0>IO-Bridge unit 0 init test             \r\n0>IO-Bridge unit 1 init test             \r\n0>Test Memory.....\r\n0>Select Bank Config\r\n0>Probe and Setup Memory\r\n0>INFO: 1024MB Bank 0, Dimm Type X4 \r\n0>INFO: No memory detected in Bank 1\r\n0>INFO: 2048MB Bank 2, Dimm Type X4 \r\n0>INFO: No memory detected in Bank 3\r\n0>\r\n0>Data Bitwalk on Master\r\n0>      Test Bank 0.\r\n0>      Test Bank 2.\r\n0>Address Bitwalk on Master\r\n0>Addr walk mem test on CPU 0 Bank 0: 00000000.00000000 to 00000000.40000000.\r\n0>Addr walk mem test on CPU 0 Bank 2: 00000002.00000000 to 00000002.80000000.\r\n0>Set Mailbox\r\n0>Final mc1 is 30000046.3e781c5b.\r\n0>Setup Final DMMU Entries\r\n0>Post Image Region Scrub\r\n0>Run POST from Memory\r\n0>Verifying checksum on copied image.\r\n0>The Memory\'s CHECKSUM value is ef2e.\r\n0>The Memory\'s Content Size value is 81569.\r\n0>Success...  Checksum on Memory Validated.\r\n0>Test CPU Caches.....\r\n0>I-Cache RAM Test\r\n0>I-Cache Tag RAM\r\n0>I-Cache Valid/Predict TAGS Test\r\n0>I-Cache Snoop Tag Field\r\n0>I-Cache Branch Predict Array Test\r\n0>Branch Prediction Initialization\r\n0>D-Cache RAM\r\n0>D-Cache Tags\r\n0>D-Cache Micro Tags\r\n0>D-Cache SnoopTags Test\r\n0>W-Cache RAM\r\n0>W-Cache Tags\r\n0>W-Cache Valid bit Test\r\n0>W-Cache Bank valid bit Test\r\n0>W-Cache SnoopTAGS Test\r\n0>P-Cache RAM\r\n0>P-Cache Tags\r\n0>P-Cache SnoopTags Test\r\n0>P-Cache Status Data Test\r\n0>8k DMMU TLB 0 Data\r\n0>8k DMMU TLB 1 Data\r\n0>8k DMMU TLB 0 Tags\r\n0>8k DMMU TLB 1 Tags\r\n0>8k IMMU TLB Data\r\n0>8k IMMU TLB Tags\r\n0>FPU Registers and Data Path\r\n0>FPU Move Registers\r\n0>FSR Read/Write\r\n0>FPU Block Register Test\r\n0>FPU Branch Instructions\r\n0>FPU Functional Test\r\n0>Scrub Memory\r\n0>Flush Caches\r\n0>Functional CPU Tests.....\r\n0>L2-Cache Functional\r\n0>L2-Cache Stress\r\n0>IMMU Functional\r\n0>DMMU Functional\r\n0>I-Cache Functional\r\n0>I-Cache Parity Functional\r\n0>I-Cache Parity Tag\r\n0>I-Cache Snoop Parity Tag\r\n0>D-Cache Functional\r\n0>D-Cache Parity Functional\r\n0>D-Cache Parity Tag Test\r\n0>W-Cache Functional\r\n0>Graphics Functional\r\n0>CPU Superscalar Dispatch\r\n0>SPARC Atomic Instruction Test\r\n0>Non SPARC Atomic Instruction Test\r\n0>SOFTINT Register and Interrupt Test\r\n0>Branch Memory Test\r\n0>Fast ECC test\r\n0>System ECC test\r\n0>XBus SRAM\r\n0>IO-Bridge SouthBridge Remap Devs       \r\n0>IO-Bridge Tests.....\r\n0>JBUS quick check\r\n0>       to IO-bridge_0 \r\n0>       to IO-bridge_1 \r\n0>IO-Bridge unit 0 sram      test   \r\n0>IO-Bridge unit 0 reg       test   \r\n0>IO-Bridge unit 0 mem       test   \r\n0>IO-Bridge unit 0 PCI id    test   \r\n0>IO-Bridge unit 0 interrupt test   \r\n0>IO-Bridge unit 1 sram      test   \r\n0>IO-Bridge unit 1 reg       test   \r\n0>IO-Bridge unit 1 mem       test   \r\n0>IO-Bridge unit 1 PCI id    test   \r\n0>IO-Bridge unit 1 interrupt test   \r\n0>Print Mem Config\r\n0>Caches : Icache is ON, Dcache is ON, Wcache is ON, Pcache is ON.\r\n0>Memory interleave set to 0\r\n0>      Bank 0 1024MB : 00000000.00000000 -> 00000000.40000000.\r\n0>      Bank 2 2048MB : 00000002.00000000 -> 00000002.80000000.\r\n0>Block Memory\r\n0>Test 1067450368 bytes on bank 0....\r\n0>0% Done...\r\n0>2% Done...\r\n0>3% Done...\r\n0>4% Done...\r\n0>6% Done...\r\n0>7% Done...\r\n0>9% Done...\r\n0>10% Done...\r\n0>11% Done...\r\n0>13% Done...\r\n0>14% Done...\r\n0>16% Done...\r\n0>17% Done...\r\n0>18% Done...\r\n0>20% Done...\r\n0>21% Done...\r\n0>22% Done...\r\n0>24% Done...\r\n0>25% Done...\r\n0>27% Done...\r\n0>28% Done...\r\n0>29% Done...\r\n0>31% Done...\r\n0>32% Done...\r\n0>34% Done...\r\n0>35% Done...\r\n0>36% Done...\r\n0>38% Done...\r\n0>39% Done...\r\n0>41% Done...\r\n0>42% Done...\r\n0>43% Done...\r\n0>45% Done...\r\n0>46% Done...\r\n0>48% Done...\r\n0>49% Done...\r\n0>50% Done...\r\n0>52% Done...\r\n0>53% Done...\r\n0>55% Done...\r\n0>56% Done...\r\n0>57% Done...\r\n0>59% Done...\r\n0>60% Done...\r\n0>62% Done...\r\n0>63% Done...\r\n0>64% Done...\r\n0>66% Done...\r\n0>67% Done...\r\n0>69% Done...\r\n0>70% Done...\r\n0>71% Done...\r\n0>73% Done...\r\n0>74% Done...\r\n0>76% Done...\r\n0>77% Done...\r\n0>78% Done...\r\n0>80% Done...\r\n0>81% Done...\r\n0>83% Done...\r\n0>84% Done...\r\n0>85% Done...\r\n0>87% Done...\r\n0>88% Done...\r\n0>90% Done...\r\n0>91% Done...\r\n0>92% Done...\r\n0>94% Done...\r\n0>95% Done...\r\n0>97% Done...\r\n0>98% Done...\r\n0>99% Done...\r\n0>Test 2147483648 bytes on bank 2....\r\n0>0% Done...\r\n0>1% Done...\r\n0>1% Done...\r\n0>2% Done...\r\n0>3% Done...\r\n0>3% Done...\r\n0>4% Done...\r\n0>5% Done...\r\n0>5% Done...\r\n0>6% Done...\r\n0>7% Done...\r\n0>7% Done...\r\n0>8% Done...\r\n0>9% Done...\r\n0>10% Done...\r\n0>10% Done...\r\n0>11% Done...\r\n0>12% Done...\r\n0>12% Done...\r\n0>13% Done...\r\n0>14% Done...\r\n0>14% Done...\r\n0>15% Done...\r\n0>16% Done...\r\n0>17% Done...\r\n0>17% Done...\r\n0>18% Done...\r\n0>19% Done...\r\n0>19% Done...\r\n0>20% Done...\r\n0>21% Done...\r\n0>21% Done...\r\n0>22% Done...\r\n0>23% Done...\r\n0>23% Done...\r\n0>24% Done...\r\n0>25% Done...\r\n0>26% Done...\r\n0>26% Done...\r\n0>27% Done...\r\n0>28% Done...\r\n0>28% Done...\r\n0>29% Done...\r\n0>30% Done...\r\n0>30% Done...\r\n0>31% Done...\r\n0>32% Done...\r\n0>32% Done...\r\n0>33% Done...\r\n0>34% Done...\r\n0>35% Done...\r\n0>35% Done...\r\n0>36% Done...\r\n\r\nSC Alert: TEMP_SENSOR @ MB.P0.T_CORE has exceeded high warning threshold.\r\n0>37% Done...\r\n0>37% Done...\r\n0>38% Done...\r\n0>39% Done...\r\n0>39% Done...\r\n0>40% Done...\r\n0>41% Done...\r\n0>42% Done...\r\n0>42% Done...\r\n0>43% Done...\r\n0>44% Done...\r\n0>44% Done...\r\n0>45% Done...\r\n0>46% Done...\r\n0>46% Done...\r\n0>47% Done...\r\n0>48% Done...\r\n0>48% Done...\r\n0>49% Done...\r\n0>50% Done...\r\n0>51% Done...\r\n0>51% Done...\r\n0>52% Done...\r\n0>53% Done...\r\n0>53% Done...\r\n0>54% Done...\r\n0>55% Done...\r\n0>55% Done...\r\n0>56% Done...\r\n0>57% Done...\r\n0>57% Done...\r\n0>58% Done...\r\n0>59% Done...\r\n0>60% Done...\r\n0>60% Done...\r\n0>61% Done...\r\n0>62% Done...\r\n0>62% Done...\r\n0>63% Done...\r\n0>64% Done...\r\n0>64% Done...\r\n0>65% Done...\r\n0>66% Done...\r\n0>67% Done...\r\n0>67% Done...\r\n0>68% Done...\r\n0>69% Done...\r\n0>69% Done...\r\n0>70% Done...\r\n0>71% Done...\r\n0>71% Done...\r\n0>72% Done...\r\n0>73% Done...\r\n0>73% Done...\r\n0>74% Done...\r\n0>75% Done...\r\n0>76% Done...\r\n0>76% Done...\r\n0>77% Done...\r\n0>78% Done...\r\n0>78% Done...\r\n0>79% Done...\r\n0>80% Done...\r\n0>80% Done...\r\n0>81% Done...\r\n0>82% Done...\r\n0>82% Done...\r\n0>83% Done...\r\n0>84% Done...\r\n0>85% Done...\r\n0>85% Done...\r\n0>86% Done...\r\n0>87% Done...\r\n0>87% Done...\r\n0>88% Done...\r\n0>89% Done...\r\n0>89% Done...\r\n0>90% Done...\r\n0>91% Done...\r\n0>92% Done...\r\n0>92% Done...\r\n0>93% Done...\r\n0>94% Done...\r\n0>94% Done...\r\n0>95% Done...\r\n0>96% Done...\r\n0>96% Done...\r\n0>97% Done...\r\n0>98% Done...\r\n0>98% Done...\r\n0>99% Done...\r\n0>INFO:\r\n0>      POST Passed all devices.\r\n0>\r\n0>POST: Return to OBP.\r\n\r\nSC Alert: Host System has Reset\r\n\r\nSC Alert: CRITICAL ALARM is set\r\n\r\nNOTICE: Keyswitch set to diagnostic position.\r\n@(#)OBP 4.18.5 2005/10/21 17:55 Sun Fire V210/V240,Netra 210/240\r\nClearing TLBs \r\nPOST Results: Cpu 0000.0000.0000.0000\r\n  %o0 = 0000.0000.0000.0000 %o1 = ffff.ffff.f00a.4556 %o2 = ffff.ffff.ffff.ffff\r\nMembase: 0000.0000.0000.0000\r\nMemSize: 0000.0000.0004.0000\r\nInit CPU arrays Done\r\nInit E$ tags Done\r\nSetup TLB (small-footprint mode) Done\r\nMMUs ON\r\nScrubbing Tomatillo tags... 0 1\r\nFind dropin, Copying Done, Size 0000.0000.0000.6e70\r\nPC = 0000.07ff.f000.5d68\r\nPC = 0000.0000.0000.5e18\r\nFind dropin, Copying Done, Size 0000.0000.0001.1bd0\r\nDiagnostic console initialized\r\nConfiguring system memory & CPU(s)\r\nProgramming IMAX \r\nCPU 0 Memory Configuration: Valid\r\nCPU 0 Bank 0 1024 MB Bank 1 <empty> Bank 2 2048 MB Bank 3 <empty> \r\n\r\nNOTICE: Keyswitch set to diagnostic position.\r\n@(#)OBP 4.18.5 2005/10/21 17:55 Sun Fire V210/V240,Netra 210/240\r\nClearing TLBs \r\nLoading Configuration\r\n\r\nMembase: 0000.0002.0000.0000\r\nMemSize: 0000.0000.8000.0000\r\nInit CPU arrays Done\r\nInit E$ tags \r\nSC Alert: TEMP_SENSOR @ MB.P0.T_CORE has exceeded high warning threshold.\r\nDone\r\nSetup TLB Done\r\nMMUs ON\r\nScrubbing Tomatillo tags... 0 1\r\nBlock Scrubbing Done\r\nFind dropin, Copying Done, Size 0000.0000.0000.6e70\r\nPC = 0000.07ff.f000.5d68\r\nPC = 0000.0000.0000.5e18\r\nFind dropin, (copied), Decompressing Done, Size 0000.0000.0006.95a0\r\nDiagnostic console initialized\r\nSystem Reset: CPU Reset (SPOR) \r\nProgramming IMAX Probing system devices\r\njbus at 0,0 SUNW,UltraSPARC-IIIi (1503 MHz @ 9:1, 1 MB) memory-controller \r\njbus at 1,0 Nothing there\r\njbus at 1f,0 pci \r\njbus at 1e,0 pci \r\njbus at 1c,0 pci \r\njbus at 1d,0 pci \r\nLoading Support Packages: kbd-translator obp-tftp SUNW,i2c-ram-device SUNW,fru-device SUNW,asr \r\nLoading onboard drivers: \r\n/pci@1e,600000: Device 7 isa \r\n/pci@1e,600000/isa@7: flashprom rtc i2c power serial serial serial rmc-comm \r\n/pci@1e,600000/isa@7/i2c@0,320: i2c-bridge i2c-bridge motherboard-fru-prom chassis-fru-prom alarm-fru-prom power-supply-fru-prom power-supply-fru-prom dimm-spd dimm-spd dimm-spd dimm-spd rscrtc nvram idprom gpio gpio gpio gpio gpio gpio \r\nProbing memory\r\nCPU 0 Bank 0 base          0 size 1024 MB\r\nCPU 0 Bank 2 base  200000000 size 2048 MB\r\nProbing I/O buses\r\n/pci@1d,700000: Device 2 network network \r\n/pci@1f,700000: Device 2 network network \r\n/pci@1e,600000: Device 6 pmu i2c gpio \r\n/pci@1e,600000/pmu@6/i2c@0,0: \r\n/pci@1e,600000: Device a usb \r\n/pci@1e,600000: Device d ide disk cdrom \r\n/pci@1e,600000: Device 2 Nothing there\r\n/pci@1e,600000: Device 3 Nothing there\r\n/pci@1c,600000: Device 2 scsi disk tape scsi disk tape \r\n/pci@1c,600000: Device 1 Nothing there\r\n/pci@1d,700000: Device 1 SUNW,XVR-100 \r\n\r\nNetra 240, No Keyboard\r\nCopyright 2005 Sun Microsystems, Inc.  All rights reserved.\r\nOpenBoot 4.18.5, 3072 MB memory installed, Serial #51720030.\r\nEthernet address 0:3:ba:15:2f:5e, Host ID: 83152f5e.\r\n\r\n\r\n\r\n\r\nRunning diagnostic script obdiag/normal\r\n\r\nTesting /pci@1e,600000/ide@d\r\n>> Primary interface selected.\r\nSubtest pci-config-reg-tests\r\nSubtest pci-config-reg-tests:vendor-id-test\r\nSubtest pci-config-reg-tests:device-id-test\r\nSubtest pci-config-reg-tests:status-reg-test\r\nSubtest pci-config-reg-tests:rom-expansion-test\r\nTesting /pci@1e,600000/isa@7/rtc@0,70\r\nSubtest rtc-tick-test\r\nTesting /pci@1c,600000/scsi@2\r\n>> SCSI registers\r\nSubtest scsi-reg-test\r\n>> SCSI timers\r\nSubtest scsi-timer-test\r\n>> SCSI DMA transfer\r\nSubtest scsi-dma-test\r\nSCSI device BIST tests not run. To run BIST tests include \"bist\" as a test-arg.\r\nTesting /pci@1c,600000/scsi@2,1\r\n>> SCSI registers\r\nSubtest scsi-reg-test\r\n>> SCSI timers\r\nSubtest scsi-timer-test\r\n>> SCSI DMA transfer\r\nSubtest scsi-dma-test\r\nSCSI device BIST tests not run. To run BIST tests include \"bist\" as a test-arg.\r\nTesting /pci@1e,600000/isa@7/serial@0,2e8\r\nSubtest internal-loopback\r\nBAUDRATE=115200 \r\n>> External Loopback Test not run. To run the test include\r\n>> \"loopback\" in TEST-ARGS and connect external loopback to the device port.\r\nTesting /pci@1e,600000/isa@7/serial@0,3f8\r\n>> Port is not tested because it is in use as a console device.\r\n\r\n\r\nSystem is operating in Service Mode.\r\n\r\nAborting auto-boot sequence.                                          \r\nok \r\nSC Alert: SC initiating soft host system shutdown due to fault at MB.P0.T_CORE.\r\n\r\nSC Alert: SC Request to Power Off Host.\r\n\r\nSC Alert: TEMP_SENSOR @ MB.P0.T_CORE has exceeded high soft shutdown threshold.\r\n\r\nSC Alert: CRITICAL ALARM is set\r\n\r\nSC Alert: Host system has shut down.\r\n\r\nSC Alert: CRITICAL ALARM is set\r\n\r\nALOM BOOTMON v1.5.4\r\nALOM Build Release: 008\r\nReset register: e0000000 EHRS ESRS LLRS