【社招】Marvell 急招ASIC工程师

domiliu

Job title: Senior ASIC Design Engineer
Location: Beijing/Shanghai
Department: Storage IC R&D

If you have any interest in the position, please send your bilingual resume as
attachments to al-china-hr@marvell.com
Subject of your email should be “Your Name_University_Applied Position Title”

Job Description
1. Provide low power design scripts for front-end and back-end flow. Carry out low power verification and generate necessary ECO scripts.
2. Run voltage drop (IR drop) analysis on full chip and sub-block levels. Deliver analysis reports and work with back-end designers to improve voltage drop.
3. Run early stage power estimation and power structure design, such as power grid and power ring. Evaluate floorplan and power structure, deliver voltage drop analysis reports.
4. Run SPICE-level voltage drop analysis on hard macros. Deliver analysis reports and work with custom designers to improve voltage drop.

Requirements
1. 2+ years industry working experience with EE/ME or background in related areas.
2. Knowledge of low power design techniques, such as power gating, DVFS, RTL level power optimization.
2. Experience in two or more of the following areas:
Low power design and verification in either front-end or backend with UPF/CPF.
Back-end design flow, such as floorplan, PNR, DRC, LVS and extraction.
Power analysis with tools like PTPX, Redhawk, XA-RA, Totem.
Digital custom design working with schematic and layout.
3. Experience in one or more of the following techniques will be a plus:
SPICE simulation
Verilog simulation
Scripting with Tcl/Python/Perl
4. Good English skills, especially writing.

Headcount 已确定，急招！