在x86上遇到的DMA 数据一致性问题

xufeifei_linux

最近在Intel i386上写了个PCIe Ramdisk Endpoint驱动，遇到一个奇怪的问题。
在用dma_alloc_coherent()分配DMA区域后，对该区域的DMA读写存在数据不一致的情况。
DMA读之前需要调用cl_flush_cache()才能读到更新的数据，DMA写也不能得到更新数据，需要在dma_alloc_coherent()之后再set_memory_uc()才能读到更新的数据。

之前在ARM上跑这个驱动不需要额外加入flush cache和set memory uncacheable，由dma_alloc_coherent()分配得到的memory就可保证此块memory数据一致性。
在x86上，根据资料，应该由硬件保证non-bufferable。但从这次在x86上跑驱动的情况看，即使使用dma_alloc_coherent()分配，得到的memory也是cachable bufferable的。
为什么呢？希望得到大家的指导

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