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Job Title: Senior Engineer, ASIC Design
Department: IC R&D
Location: Shanghai & Beijing
Derived from historic Data Storage and Datacom IC R&D, the IC R&D - Shanghai develop and implement advanced digital signal processing technologies and integrate advanced mixed-signal technologies for Storage Read Channel, Gigabit Ethernet, SATA PHY, Digital TV and other products. The digital design group is dynamic, exciting and rewarding, with many opportunities for professional growth for a motivated candidate.
You enjoy to follow through from circuit architecture conception to circuit implementation and verification, and to master the challenges of advanced deep sub-micron process technologies. You will also work on pure ASIC flow or full custom ASIC design flow to achieve high speed clock requirement of Giga Hz level and low power design target. You work closely with your peers, system architects, application engineers, field application engineers, and product engineers to find the optimal and most cost efficient solution for our customers. We provide ample opportunity to put your creativity to test.
Description:
- Design and develop high-speed and low power digital circuits for the digital signal processing core of the different product lines using state-of-the-art IC design methodologies and design flows.
- Design high-speed data paths to implement arithmetic functions and signal processing algorithms.
- Write RTL code for high-speed and multi-clock domain designs.
- Perform functional verification of designs on block and chip level.
- Perform synthesis and pre- and post-layout timing closure.
- Oversee and guide layout and physical verification activities.
- Contribute test specifications and support evaluation of the design in coordination with application and product engineering.
- Provide design documentation, descriptions and information to application engineers, field application engineers, product engineers, and customers.
Qualifications:
-MSEE with 2+ years
-Understanding the basic Analog/digital circuit building blocks.
-Able to use spice, verilog and layout tools for circuit and logic design
-Able to perform functional and timing verification for circuit and logic design
-Understanding C and Perl programming.
If you have any interest in the position, please send your bilingual resume as attachments to emilyye@marvell.com or marvellresume@126.com
Subject of your email should be “Your Name_University_Applied Position Title”
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