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开始换CPU板。
root@sdwg11 # cfgadm -l -s "select=class(sbd)"
cfgadm -l -s "select=class(sbd)"
Ap_Id Type Receptacle Occupant Condition
N0.IB6 PCI_I/O_Boa connected configured ok
N0.IB8 PCI_I/O_Boa connected configured ok
N0.SB0 CPU_V2 connected configured ok
N0.SB2 CPU_V2 disconnected unconfigured failed
N0.SB4 CPU_V2 connected configured ok
root@sdwg11 # cfgadm -l -a
cfgadm -l -a
Ap_Id Type Receptacle Occupant Condition
N0.IB6 PCI_I/O_Boa connected configured ok
N0.IB6::pci0 io connected configured ok
N0.IB6::pci1 io connected configured ok
N0.IB6::pci2 io connected configured ok
N0.IB6::pci3 io connected configured ok
N0.IB8 PCI_I/O_Boa connected configured ok
N0.IB8::pci0 io connected configured ok
N0.IB8::pci1 io connected configured ok
N0.IB8::pci2 io connected configured ok
N0.IB8::pci3 io connected configured ok
N0.SB0 CPU_V2 connected configured ok
N0.SB0::cpu0 cpu connected configured ok
N0.SB0::cpu1 cpu connected configured ok
N0.SB0::cpu2 cpu connected configured ok
N0.SB0::cpu3 cpu connected configured ok
N0.SB0::memory memory connected configured ok
N0.SB2 CPU_V2 disconnected unconfigured failed
N0.SB4 CPU_V2 connected configured ok
N0.SB4::cpu0 cpu connected configured ok
N0.SB4::cpu1 cpu connected configured ok
N0.SB4::cpu2 cpu connected configured ok
N0.SB4::cpu3 cpu connected configured ok
N0.SB4::memory memory connected configured ok
c0 scsi-bus connected configured unknown
c0::dsk/c0t0d0 disk connected configured unknown
c0::dsk/c0t6d0 CD-ROM connected configured unknown
c1 scsi-bus connected configured unknown
c1::/dev/sd80a disk connected configured unknown
c2 scsi-bus connected configured unknown
c2::dsk/c2t0d0 disk connected configured unknown
c4 scsi-bus connected unconfigured unknown
c5 scsi-bus connected unconfigured unknown
c6 scsi-bus connected unconfigured unknown
c7 scsi-bus connected unconfigured unknown
c9 scsi-bus connected configured unknown
c9::/dev/sd110a disk connected configured unknown
root@sdwg11 # cfgadm -c disconnect N0.SB2
cfgadm -c disconnect N0.SB2
root@sdwg11 #
disconnect后,板卡的指示灯,电源灯由绿色变灭,故障灯琥珀色未变,移除灯由灭变琥珀色。
root@sdwg11 # cfgadm -l -a
cfgadm -l -a
Ap_Id Type Receptacle Occupant Condition
N0.IB6 PCI_I/O_Boa connected configured ok
N0.IB6::pci0 io connected configured ok
N0.IB6::pci1 io connected configured ok
N0.IB6::pci2 io connected configured ok
N0.IB6::pci3 io connected configured ok
N0.IB8 PCI_I/O_Boa connected configured ok
N0.IB8::pci0 io connected configured ok
N0.IB8::pci1 io connected configured ok
N0.IB8::pci2 io connected configured ok
N0.IB8::pci3 io connected configured ok
N0.SB0 CPU_V2 connected configured ok
N0.SB0::cpu0 cpu connected configured ok
N0.SB0::cpu1 cpu connected configured ok
N0.SB0::cpu2 cpu connected configured ok
N0.SB0::cpu3 cpu connected configured ok
N0.SB0::memory memory connected configured ok
N0.SB2 CPU_V2 disconnected unconfigured unknown
N0.SB4 CPU_V2 connected configured ok
N0.SB4::cpu0 cpu connected configured ok
N0.SB4::cpu1 cpu connected configured ok
N0.SB4::cpu2 cpu connected configured ok
N0.SB4::cpu3 cpu connected configured ok
N0.SB4::memory memory connected configured ok
c0 scsi-bus connected configured unknown
c0::dsk/c0t0d0 disk connected configured unknown
c0::dsk/c0t6d0 CD-ROM connected configured unknown
c1 scsi-bus connected configured unknown
c1::/dev/sd80a disk connected configured unknown
c2 scsi-bus connected configured unknown
c2::dsk/c2t0d0 disk connected configured unknown
c4 scsi-bus connected unconfigured unknown
c5 scsi-bus connected unconfigured unknown
c6 scsi-bus connected unconfigured unknown
c7 scsi-bus connected unconfigured unknown
c9 scsi-bus connected configured unknown
c9::/dev/sd110a disk connected configured unknown
root@sdwg11 #
手册上要求只有移除灯亮时才能拔,但是已经poweroff了,不知道咋再处理了,拔之。
sdwg11:A> Jul 27 15:49:42 sdwg11 Platform.SC: SB2, hotplug status, SB2, module removed (9,16)
root@sdwg11 # cfgadm -l
cfgadm -l
Ap_Id Type Receptacle Occupant Condition
N0.IB6 PCI_I/O_Boa connected configured ok
N0.IB8 PCI_I/O_Boa connected configured ok
N0.SB0 CPU_V2 connected configured ok
N0.SB2 unknown empty unconfigured unknown
N0.SB4 CPU_V2 connected configured ok
c0 scsi-bus connected configured unknown
c1 scsi-bus connected configured unknown
c2 scsi-bus connected configured unknown
c4 scsi-bus connected unconfigured unknown
c5 scsi-bus connected unconfigured unknown
c6 scsi-bus connected unconfigured unknown
c7 scsi-bus connected unconfigured unknown
c9 scsi-bus connected configured unknown
root@sdwg11 #
换上内存,插上板子
Jul 27 16:01:44 sdwg11 Platform.SC: SB2, hotplug status, SB2, module inserted (9,17)
sdwg11:A> showb -v
showb -v
Slot Pwr Component Type State Status Domain
---- --- -------------- ----- ------ ------
/N0/SB0 On CPU Board V2 Active Passed A
SB2 Off CPU Board V2 Available Not tested Isolated
/N0/SB4 On CPU Board V2 Active Passed A
/N0/IB6 On PCI I/O Board Active Passed A
/N0/IB8 On PCI I/O Board Active Passed A
sdwg11:SC> poweron sb2
poweron sb2
SB2: powered on
sdwg11:SC> showb -v
showb -v
Slot Pwr Component Type State Status Domain
---- --- -------------- ----- ------ ------
SSC0 On System Controller Main Passed -
SSC1 On Present Spare - -
ID0 On Sun Fire 4800 Centerplane - OK -
PS0 On A153 Power Supply - OK -
PS1 On A153 Power Supply - OK -
PS2 On A153 Power Supply - OK -
FT0 On Fan Tray High Speed OK -
FT1 On Fan Tray High Speed OK -
FT2 On Fan Tray High Speed OK -
RP0 On Repeater Board - OK -
RP2 On Repeater Board - OK -
/N0/SB0 On CPU Board V2 Active Passed A
SB2 On CPU Board V2 Available Not tested Isolated
/N0/SB4 On CPU Board V2 Active Passed A
/N0/IB6 On PCI I/O Board Active Passed A
/N0/IB8 On PCI I/O Board Active Passed A
sdwg11:SC> showb -p version
showb -p version
Component Compatible Version
--------- ---------- -------
SSC0 Reference 5.20.6 Build_02
SB2 Yes 5.20.3 Build_03
/N0/IB6 Yes 5.20.6 Build_02
/N0/IB8 Yes 5.20.16 Build_01
/N0/SB0 Yes 5.20.6 Build_02
/N0/SB4 Yes 5.20.6 Build_02
sdwg11:SC> flashupdate -c sb4 sb2
flashupdate -c sb4 sb2
Waiting for critical processes to finish. This may take a while.
Critical processes have finished.
Updating the flash image of PROM SB2/FP0 with PROM /N0/SB4/FP0
Erasing .................. Done
Programming .................. Done
Verifying .................. Done
Updating the flash image of PROM SB2/FP1 with PROM /N0/SB4/FP0
Erasing .................. Done
Programming .................. Done
Verifying .................. Done
sdwg11:SC>
sdwg11:SC> showb -p ver
showb -p ver
Component Compatible Version
--------- ---------- -------
SSC0 Reference 5.20.6 Build_02
SB2 Yes 5.20.6 Build_02
/N0/IB6 Yes 5.20.6 Build_02
/N0/IB8 Yes 5.20.16 Build_01
/N0/SB0 Yes 5.20.6 Build_02
/N0/SB4 Yes 5.20.6 Build_02
sdwg11:SC> addb -d a sb2
addb -d a sb2
/N0/SB2: will be configured into the domain after setkeyswitch off/standby
DR can be used to configure /N0/SB2 into an active domain.
sdwg11:SC>
root@sdwg11 # cfgadm -l
cfgadm -l
Ap_Id Type Receptacle Occupant Condition
N0.IB6 PCI_I/O_Boa connected configured ok
N0.IB8 PCI_I/O_Boa connected configured ok
N0.SB0 CPU_V2 connected configured ok
N0.SB2 CPU_V2 disconnected unconfigured unknown
N0.SB4 CPU_V2 connected configured ok
c0 scsi-bus connected configured unknown
c1 scsi-bus connected configured unknown
c2 scsi-bus connected configured unknown
c4 scsi-bus connected unconfigured unknown
c5 scsi-bus connected unconfigured unknown
c6 scsi-bus connected unconfigured unknown
c7 scsi-bus connected unconfigured unknown
c9 scsi-bus connected configured unknown
root@sdwg11 #
root@sdwg11 # cfgadm -t N0.SB2
cfgadm -t N0.SB2
{/N0/SB2/P0} Running CPU POR and Set Clocks
{/N0/SB2/P1} Running CPU POR and Set Clocks
{/N0/SB2/P0} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P1} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P0} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P1} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P0} Use is subject to license terms.
{/N0/SB2/P1} Use is subject to license terms.
{/N0/SB2/P2} Running CPU POR and Set Clocks
{/N0/SB2/P3} Running CPU POR and Set Clocks
{/N0/SB2/P2} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P3} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P2} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P3} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P2} Use is subject to license terms.
{/N0/SB2/P3} Use is subject to license terms.
{/N0/SB2/P0} Running Basic CPU
{/N0/SB2/P2} Running Basic CPU
{/N0/SB2/P1} Running Basic CPU
{/N0/SB2/P0} Subtest: Setting Fireplane Config Registers for aid 0x8
{/N0/SB2/P1} Subtest: Setting Fireplane Config Registers for aid 0x9
{/N0/SB2/P0} Subtest: Display CPU Version, frequency
{/N0/SB2/P1} Subtest: Display CPU Version, frequency
{/N0/SB2/P0} Version register = 003e0015.b0000507
{/N0/SB2/P3} Running Basic CPU
{/N0/SB2/P1} Version register = 003e0015.b0000507
{/N0/SB2/P2} Subtest: Setting Fireplane Config Registers for aid 0xa
{/N0/SB2/P3} Subtest: Setting Fireplane Config Registers for aid 0xb
{/N0/SB2/P2} Subtest: Display CPU Version, frequency
{/N0/SB2/P3} Subtest: Display CPU Version, frequency
{/N0/SB2/P2} Version register = 003e0015.b0000507
{/N0/SB2/P3} Version register = 003e0015.b0000507
{/N0/SB2/P0} CPU features = 0000225f.005205ff
{/N0/SB2/P1} CPU features = 0000225f.005205ff
{/N0/SB2/P2} CPU features = 0000225f.005205ff
{/N0/SB2/P3} CPU features = 0000225f.005205ff
{/N0/SB2/P0} Ecache Control Register 00000000.07c55400
{/N0/SB2/P1} Ecache Control Register 00000000.07c55400
{/N0/SB2/P0} Running Test Large Tag Arrays and Enable MMU
{/N0/SB2/P1} Running Test Large Tag Arrays and Enable MMU
{/N0/SB2/P2} Running Test Large Tag Arrays and Enable MMU
{/N0/SB2/P3} Running Test Large Tag Arrays and Enable MMU
{/N0/SB2/P2} Ecache Control Register 00000000.07c55400
{/N0/SB2/P3} Ecache Control Register 00000000.07c55400
{/N0/SB2/P2} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB2/P3} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB2/P2} @(#) lpost 5.20.6 2007/05/23 08:54
Jul 27 16:26:35 sdwg11 sendmail[2956]: NOQUEUE: SYSERR(tmn): can not chdir(/var/spool/clientmqueue/): Permission denied
{/N0/SB2/P3} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P0} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB2/P1} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB2/P0} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P1} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P0} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P2} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P3} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P1} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P0} Running FPU Tests
{/N0/SB2/P1} Running FPU Tests
{/N0/SB2/P0} Use is subject to license terms.
{/N0/SB2/P1} Use is subject to license terms.
{/N0/SB2/P0} Subtest: I-Cache Initialization
{/N0/SB2/P1} Subtest: I-Cache Initialization
{/N0/SB2/P2} Running FPU Tests
{/N0/SB2/P3} Running FPU Tests
{/N0/SB2/P0} Subtest: D-Cache Initialization
{/N0/SB2/P2} Use is subject to license terms.
{/N0/SB2/P1} Subtest: D-Cache Initialization
{/N0/SB2/P3} Use is subject to license terms.
{/N0/SB2/P2} Subtest: I-Cache Initialization
{/N0/SB2/P3} Subtest: I-Cache Initialization
{/N0/SB2/P2} Subtest: D-Cache Initialization
{/N0/SB2/P3} Subtest: D-Cache Initialization
{/N0/SB2/P2} Running Basic Ecache
{/N0/SB2/P3} Running Basic Ecache
{/N0/SB2/P2} Subtest: W-Cache Initialization
{/N0/SB2/P3} Subtest: W-Cache Initialization
{/N0/SB2/P2} Subtest: P-Cache Initialization
{/N0/SB2/P3} Subtest: P-Cache Initialization
{/N0/SB2/P2} Subtest: Branch Prediction Initialization
{/N0/SB2/P0} Running Basic Ecache
{/N0/SB2/P1} Running Basic Ecache
{/N0/SB2/P0} Subtest: W-Cache Initialization
{/N0/SB2/P1} Subtest: W-Cache Initialization
{/N0/SB2/P0} Subtest: P-Cache Initialization
{/N0/SB2/P1} Subtest: P-Cache Initialization
{/N0/SB2/P3} Subtest: Branch Prediction Initialization
{/N0/SB2/P0} Subtest: Branch Prediction Initialization
{/N0/SB2/P1} Subtest: Branch Prediction Initialization
{/N0/SB2/P2} Subtest: E-Cache Global Variables Initialization
{/N0/SB2/P3} Subtest: E-Cache Global Variables Initialization
{/N0/SB2/P2} Running Memory Registers Tests
{/N0/SB2/P0} Running Memory Registers Tests
{/N0/SB2/P3} Running Memory Registers Tests
{/N0/SB2/P2} Subtest: Fast Init. Verification Test
{/N0/SB2/P1} Running Memory Registers Tests
{/N0/SB2/P0} Subtest: E-Cache Global Variables Initialization
{/N0/SB2/P1} Subtest: E-Cache Global Variables Initialization
{/N0/SB2/P0} Subtest: Fast Init. Verification Test
{/N0/SB2/P1} Subtest: Fast Init. Verification Test
{/N0/SB2/P0} Subtest: IMMU Initialization
{/N0/SB2/P1} Subtest: IMMU Initialization
{/N0/SB2/P3} Subtest: Fast Init. Verification Test
{/N0/SB2/P2} Subtest: IMMU Initialization
{/N0/SB2/P3} Subtest: IMMU Initialization
{/N0/SB2/P2} Subtest: DMMU Initialization
{/N0/SB2/P3} Subtest: DMMU Initialization
{/N0/SB2/P0} Running Memory Configuration Tests
{/N0/SB2/P1} Running Memory Configuration Tests
{/N0/SB2/P0} Subtest: DMMU Initialization
{/N0/SB2/P1} Subtest: DMMU Initialization
{/N0/SB2/P0} Subtest: Map LPOST to local space
{/N0/SB2/P2} Running Memory Configuration Tests
{/N0/SB2/P3} Running Memory Configuration Tests
{/N0/SB2/P2} Subtest: Map LPOST to local space
{/N0/SB2/P3} Subtest: Map LPOST to local space
{/N0/SB2/P1} Subtest: Map LPOST to local space
{/N0/SB2/P2} Subtest: E-Cache Initialization of first 1K
{/N0/SB2/P3} Subtest: E-Cache Initialization of first 1K
{/N0/SB2/P0} Subtest: E-Cache Initialization of first 1K
{/N0/SB2/P2} Subtest: E-Cache Initialization
{/N0/SB2/P1} Subtest: E-Cache Initialization of first 1K
{/N0/SB2/P3} Subtest: E-Cache Initialization
{/N0/SB2/P0} Subtest: E-Cache Initialization
{/N0/SB2/P1} Subtest: E-Cache Initialization
{/N0/SB2/P2} Subtest: Disable Memory Controllers
{/N0/SB2/P3} Subtest: Disable Memory Controllers
{/N0/SB2/P0} Subtest: Disable Memory Controllers
{/N0/SB2/P1} Subtest: Disable Memory Controllers
{/N0/SB2/P2} Subtest: Memory Controller Configuration
{/N0/SB2/P3} Subtest: Memory Controller Configuration
{/N0/SB2/P0} Subtest: Memory Controller Configuration
{/N0/SB2/P1} Subtest: Memory Controller Configuration
{/N0/SB2/P2} Subtest: Memory DIMMs Init
{/N0/SB2/P0} Subtest: Memory DIMMs Init
{/N0/SB2/P1} Subtest: Memory DIMMs Init
{/N0/SB2/P3} Subtest: Memory DIMMs Init
{/N0/SB2/P0} Subtest: UP Memory Clear
{/N0/SB2/P1} Subtest: UP Memory Clear
{/N0/SB2/P2} Subtest: UP Memory Clear
{/N0/SB2/P3} Subtest: UP Memory Clear
{/N0/SB2/P2} Running Memory Tests
{/N0/SB2/P3} Running Memory Tests
{/N0/SB2/P2} Subtest: Enable Correctable Error Traps
{/N0/SB2/P3} Subtest: Enable Correctable Error Traps
{/N0/SB2/P0} Running Memory Tests
{/N0/SB2/P1} Running Memory Tests
{/N0/SB2/P0} Subtest: Enable Correctable Error Traps
{/N0/SB2/P1} Subtest: Enable Correctable Error Traps
{/N0/SB2/P0} Running Advanced CPU Tests
{/N0/SB2/P2} Running Advanced CPU Tests
{/N0/SB2/P1} Running Advanced CPU Tests
{/N0/SB2/P3} Running Advanced CPU Tests
{/N0/SB2/P2} Running CPU ECC Tests
{/N0/SB2/P0} Running CPU ECC Tests
{/N0/SB2/P3} Running CPU ECC Tests
{/N0/SB2/P1} Running CPU ECC Tests
{/N0/SB2/P2} Running System Level Tests
{/N0/SB2/P3} Running System Level Tests
{/N0/SB2/P2} Subtest: Invalidate Caches
{/N0/SB2/P0} Running System Level Tests
{/N0/SB2/P1} Running System Level Tests
{/N0/SB2/P0} Subtest: Invalidate Caches
{/N0/SB2/P1} Subtest: Invalidate Caches
{/N0/SB2/P3} Subtest: Invalidate Caches
{/N0/SB2/P2} Running Board Memory Interleave
{/N0/SB2/P3} Running Board Memory Interleave
{/N0/SB2/P2} Subtest: Board Memory Interleave Configuration
{/N0/SB2/P3} Subtest: Board Memory Interleave Configuration
{/N0/SB2/P0} Running Board Memory Interleave
{/N0/SB2/P1} Running Board Memory Interleave
{/N0/SB2/P0} Subtest: Board Memory Interleave Configuration
{/N0/SB2/P1} Subtest: Board Memory Interleave Configuration
{/N0/SB2/P0} Passed
{/N0/SB2/P1} Passed
{/N0/SB2/P2} Passed
{/N0/SB2/P3} Passed
root@sdwg11 #
root@sdwg11 # cfgadm -l
cfgadm -l
Ap_Id Type Receptacle Occupant Condition
N0.IB6 PCI_I/O_Boa connected configured ok
N0.IB8 PCI_I/O_Boa connected configured ok
N0.SB0 CPU_V2 connected configured ok
N0.SB2 CPU_V2 disconnected unconfigured ok
N0.SB4 CPU_V2 connected configured ok
c0 scsi-bus connected configured unknown
c1 scsi-bus connected configured unknown
c2 scsi-bus connected configured unknown
c4 scsi-bus connected unconfigured unknown
c5 scsi-bus connected unconfigured unknown
c6 scsi-bus connected unconfigured unknown
c7 scsi-bus connected unconfigured unknown
c9 scsi-bus connected configured unknown
root@sdwg11 # cfgadm -c connect N0.SB2
cfgadm -c connect N0.SB2
{/N0/SB2/P2} Running CPU POR and Set Clocks
{/N0/SB2/P3} Running CPU POR and Set Clocks
{/N0/SB2/P2} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P3} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P2} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P0} Running CPU POR and Set Clocks
{/N0/SB2/P3} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P2} Use is subject to license terms.
{/N0/SB2/P3} Use is subject to license terms.
{/N0/SB2/P1} Running CPU POR and Set Clocks
{/N0/SB2/P0} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P1} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P0} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P1} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P0} Use is subject to license terms.
{/N0/SB2/P1} Use is subject to license terms.
{/N0/SB2/P2} Running Basic CPU
{/N0/SB2/P0} Running Basic CPU
{/N0/SB2/P1} Running Basic CPU
{/N0/SB2/P0} Subtest: Setting Fireplane Config Registers for aid 0x8
{/N0/SB2/P1} Subtest: Setting Fireplane Config Registers for aid 0x9
{/N0/SB2/P0} Subtest: Display CPU Version, frequency
{/N0/SB2/P1} Subtest: Display CPU Version, frequency
{/N0/SB2/P0} Version register = 003e0015.b0000507
{/N0/SB2/P1} Version register = 003e0015.b0000507
{/N0/SB2/P3} Running Basic CPU
{/N0/SB2/P2} Subtest: Setting Fireplane Config Registers for aid 0xa
{/N0/SB2/P3} Subtest: Setting Fireplane Config Registers for aid 0xb
{/N0/SB2/P2} Subtest: Display CPU Version, frequency
{/N0/SB2/P3} Subtest: Display CPU Version, frequency
{/N0/SB2/P2} Version register = 003e0015.b0000507
{/N0/SB2/P3} Version register = 003e0015.b0000507
{/N0/SB2/P0} CPU features = 0000225f.005205ff
{/N0/SB2/P1} CPU features = 0000225f.005205ff
{/N0/SB2/P2} CPU features = 0000225f.005205ff
{/N0/SB2/P0} Ecache Control Register 00000000.07c55400
{/N0/SB2/P1} Ecache Control Register 00000000.07c55400
{/N0/SB2/P3} CPU features = 0000225f.005205ff
{/N0/SB2/P0} Running Test Large Tag Arrays and Enable MMU
{/N0/SB2/P1} Running Test Large Tag Arrays and Enable MMU
{/N0/SB2/P2} Running Test Large Tag Arrays and Enable MMU
{/N0/SB2/P0} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB2/P3} Running Test Large Tag Arrays and Enable MMU
{/N0/SB2/P1} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB2/P0} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P2} Ecache Control Register 00000000.07c55400
{/N0/SB2/P1} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P0} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P1} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P3} Ecache Control Register 00000000.07c55400
{/N0/SB2/P2} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB2/P3} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB2/P2} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P3} @(#) lpost 5.20.6 2007/05/23 08:54
{/N0/SB2/P2} Running FPU Tests
{/N0/SB2/P3} Running FPU Tests
{/N0/SB2/P2} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P3} Copyright 2007 Sun Microsystems, Inc. All rights reserved.
{/N0/SB2/P2} Use is subject to license terms.
{/N0/SB2/P0} Running FPU Tests
{/N0/SB2/P1} Running FPU Tests
{/N0/SB2/P3} Use is subject to license terms.
{/N0/SB2/P2} Subtest: I-Cache Initialization
{/N0/SB2/P3} Subtest: I-Cache Initialization
{/N0/SB2/P0} Use is subject to license terms.
{/N0/SB2/P1} Use is subject to license terms.
{/N0/SB2/P0} Subtest: I-Cache Initialization
{/N0/SB2/P1} Subtest: I-Cache Initialization
{/N0/SB2/P0} Subtest: D-Cache Initialization
{/N0/SB2/P1} Subtest: D-Cache Initialization
{/N0/SB2/P0} Running Basic Ecache
{/N0/SB2/P1} Running Basic Ecache
{/N0/SB2/P0} Subtest: W-Cache Initialization
{/N0/SB2/P1} Subtest: W-Cache Initialization
{/N0/SB2/P0} Subtest: P-Cache Initialization
{/N0/SB2/P1} Subtest: P-Cache Initialization
{/N0/SB2/P2} Running Basic Ecache
{/N0/SB2/P3} Running Basic Ecache
{/N0/SB2/P0} Subtest: Branch Prediction Initialization
{/N0/SB2/P1} Subtest: Branch Prediction Initialization
{/N0/SB2/P2} Subtest: D-Cache Initialization
{/N0/SB2/P3} Subtest: D-Cache Initialization
{/N0/SB2/P2} Subtest: W-Cache Initialization
{/N0/SB2/P3} Subtest: W-Cache Initialization
{/N0/SB2/P2} Subtest: P-Cache Initialization
{/N0/SB2/P3} Subtest: P-Cache Initialization
{/N0/SB2/P2} Running Memory Registers Tests
{/N0/SB2/P0} Running Memory Registers Tests
{/N0/SB2/P1} Running Memory Registers Tests
{/N0/SB2/P0} Subtest: E-Cache Global Variables Initialization
{/N0/SB2/P1} Subtest: E-Cache Global Variables Initialization
{/N0/SB2/P0} Subtest: Fast Init. Verification Test
{/N0/SB2/P1} Subtest: Fast Init. Verification Test
{/N0/SB2/P3} Running Memory Registers Tests
{/N0/SB2/P2} Subtest: Branch Prediction Initialization
{/N0/SB2/P3} Subtest: Branch Prediction Initialization
{/N0/SB2/P2} Subtest: E-Cache Global Variables Initialization
{/N0/SB2/P3} Subtest: E-Cache Global Variables Initialization
{/N0/SB2/P2} Subtest: Fast Init. Verification Test
{/N0/SB2/P3} Subtest: Fast Init. Verification Test
{/N0/SB2/P0} Subtest: IMMU Initialization
{/N0/SB2/P1} Subtest: IMMU Initialization
{/N0/SB2/P0} Running Memory Configuration Tests
{/N0/SB2/P2} Running Memory Configuration Tests
{/N0/SB2/P3} Running Memory Configuration Tests
{/N0/SB2/P2} Subtest: IMMU Initialization
{/N0/SB2/P3} Subtest: IMMU Initialization
{/N0/SB2/P2} Subtest: DMMU Initialization
{/N0/SB2/P3} Subtest: DMMU Initialization
{/N0/SB2/P1} Running Memory Configuration Tests
{/N0/SB2/P0} Subtest: DMMU Initialization
{/N0/SB2/P1} Subtest: DMMU Initialization
{/N0/SB2/P0} Subtest: Map LPOST to local space
{/N0/SB2/P1} Subtest: Map LPOST to local space
{/N0/SB2/P2} Subtest: Map LPOST to local space
{/N0/SB2/P0} Subtest: E-Cache Initialization of first 1K
{/N0/SB2/P1} Subtest: E-Cache Initialization of first 1K
{/N0/SB2/P3} Subtest: Map LPOST to local space
{/N0/SB2/P0} Subtest: E-Cache Initialization
{/N0/SB2/P1} Subtest: E-Cache Initialization
{/N0/SB2/P2} Subtest: E-Cache Initialization of first 1K
{/N0/SB2/P3} Subtest: E-Cache Initialization of first 1K
{/N0/SB2/P0} Subtest: Disable Memory Controllers
{/N0/SB2/P1} Subtest: Disable Memory Controllers
{/N0/SB2/P2} Subtest: E-Cache Initialization
{/N0/SB2/P3} Subtest: E-Cache Initialization
{/N0/SB2/P0} Subtest: Memory Controller Configuration
{/N0/SB2/P2} Subtest: Disable Memory Controllers
{/N0/SB2/P3} Subtest: Disable Memory Controllers
{/N0/SB2/P1} Subtest: Memory Controller Configuration
{/N0/SB2/P2} Running Memory Tests
{/N0/SB2/P3} Running Memory Tests
{/N0/SB2/P2} Subtest: Memory Controller Configuration
{/N0/SB2/P3} Subtest: Memory Controller Configuration
{/N0/SB2/P2} Subtest: Memory DIMMs Init
{/N0/SB2/P3} Subtest: Memory DIMMs Init
{/N0/SB2/P2} Subtest: UP Memory Clear
{/N0/SB2/P3} Subtest: UP Memory Clear
{/N0/SB2/P0} Running Memory Tests
{/N0/SB2/P1} Running Memory Tests
{/N0/SB2/P0} Subtest: Memory DIMMs Init
{/N0/SB2/P1} Subtest: Memory DIMMs Init
{/N0/SB2/P0} Subtest: UP Memory Clear
{/N0/SB2/P1} Subtest: UP Memory Clear
{/N0/SB2/P0} Subtest: Enable Correctable Error Traps
{/N0/SB2/P1} Subtest: Enable Correctable Error Traps
{/N0/SB2/P0} Running Advanced CPU Tests
{/N0/SB2/P1} Running Advanced CPU Tests
{/N0/SB2/P2} Running Advanced CPU Tests
{/N0/SB2/P3} Running Advanced CPU Tests
{/N0/SB2/P2} Subtest: Enable Correctable Error Traps
{/N0/SB2/P3} Subtest: Enable Correctable Error Traps
{/N0/SB2/P2} Running CPU ECC Tests
{/N0/SB2/P3} Running CPU ECC Tests
{/N0/SB2/P0} Running CPU ECC Tests
{/N0/SB2/P1} Running CPU ECC Tests
{/N0/SB2/P0} Running System Level Tests
{/N0/SB2/P1} Running System Level Tests
{/N0/SB2/P0} Subtest: Invalidate Caches
{/N0/SB2/P1} Subtest: Invalidate Caches
{/N0/SB2/P2} Running System Level Tests
{/N0/SB2/P3} Running System Level Tests
{/N0/SB2/P2} Subtest: Invalidate Caches
{/N0/SB2/P3} Subtest: Invalidate Caches
{/N0/SB2/P2} Running Board Memory Interleave
{/N0/SB2/P3} Running Board Memory Interleave
{/N0/SB2/P2} Subtest: Board Memory Interleave Configuration
{/N0/SB2/P3} Subtest: Board Memory Interleave Configuration
{/N0/SB2/P0} Running Board Memory Interleave
{/N0/SB2/P1} Running Board Memory Interleave
{/N0/SB2/P0} Subtest: Board Memory Interleave Configuration
{/N0/SB2/P1} Subtest: Board Memory Interleave Configuration
{/N0/SB2/P0} Passed
{/N0/SB2/P1} Passed
{/N0/SB2/P2} Passed
{/N0/SB2/P3} Passed
{/N0/SB2/P0} DCB_ENTER_OBP command succeeded
{/N0/SB2/P1} DCB_ENTER_OBP command succeeded
{/N0/SB2/P2} DCB_ENTER_OBP command succeeded
{/N0/SB2/P3} DCB_ENTER_OBP command succeeded
root@sdwg11 #
root@sdwg11 # cfgadm -l
cfgadm -l
Ap_Id Type Receptacle Occupant Condition
N0.IB6 PCI_I/O_Boa connected configured ok
N0.IB8 PCI_I/O_Boa connected configured ok
N0.SB0 CPU_V2 connected configured ok
N0.SB2 CPU_V2 connected unconfigured ok
N0.SB4 CPU_V2 connected configured ok
c0 scsi-bus connected configured unknown
c1 scsi-bus connected configured unknown
c2 scsi-bus connected configured unknown
c4 scsi-bus connected unconfigured unknown
c5 scsi-bus connected unconfigured unknown
c6 scsi-bus connected unconfigured unknown
c7 scsi-bus connected unconfigured unknown
c9 scsi-bus connected configured unknown
root@sdwg11 #
root@sdwg11 # cfgadm -c configure N0.SB2
cfgadm -c configure N0.SB2
Jul 27 16:31:58 sdwg11 sendmail[24952]: NOQUEUE: SYSERR(tmn): can not chdir(/var/spool/clientmqueue/): Permission denied
Jul 27 16:32:00 sdwg11 unix: WARNING: [AFT0] Sticky Softerror encountered on Memory Module /N0/SB2/P2/B0/D0 J15300
Jul 27 16:32:00 sdwg11 unix: NOTICE: Scheduling removal of page 0x00000040.ffd2c000
Jul 27 16:32:00 sdwg11 unix: NOTICE: Page 0x00000040.ffd2c000 removed from service
Jul 27 16:32:00 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
Jul 27 16:32:00 sdwg11 unix: NOTICE: Scheduling removal of page 0x00000040.ff5b4000
Jul 27 16:32:00 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
Jul 27 16:32:00 sdwg11 unix: NOTICE: Page 0x00000040.ff5b4000 removed from service
root@sdwg11 # Jul 27 16:32:05 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
Jul 27 16:32:05 sdwg11 unix: NOTICE: Scheduling removal of page 0x00000040.03d4e000
Jul 27 16:32:05 sdwg11 unix: NOTICE: Page 0x00000040.03d4e000 removed from service
Jul 27 16:32:06 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
Jul 27 16:32:06 sdwg11 unix: NOTICE: Scheduling removal of page 0x00000040.ffbe8000
Jul 27 16:32:06 sdwg11 unix: NOTICE: Page 0x00000040.ffbe8000 removed from service
Jul 27 16:32:11 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
Jul 27 16:32:17 sdwg11 last message repeated 1 time
Jul 27 16:32:17 sdwg11 unix: NOTICE: Scheduling removal of page 0x00000040.facc0000
Jul 27 16:32:17 sdwg11 unix: NOTICE: Page 0x00000040.facc0000 removed from service
root@sdwg11 # cfgadm -l
cfgadm -l
Jul 27 16:32:27 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
Jul 27 16:32:27 sdwg11 unix: NOTICE: Scheduling removal of page 0x00000040.ff92c000
Jul 27 16:32:27 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
Jul 27 16:32:27 sdwg11 unix: NOTICE: Page 0x00000040.ff92c000 removed from service
Ap_Id Type Receptacle Occupant Condition
N0.IB6 PCI_I/O_Boa connected configured ok
N0.IB8 PCI_I/O_Boa connected configured ok
N0.SB0 CPU_V2 connected configured ok
N0.SB2 CPU_V2 connected configured ok
N0.SB4 CPU_V2 connected configured ok
c0 scsi-bus connected configured unknown
c1 scsi-bus connected configured unknown
c2 scsi-bus connected configured unknown
c4 scsi-bus connected unconfigured unknown
c5 scsi-bus connected unconfigured unknown
c6 scsi-bus connected unconfigured unknown
c7 scsi-bus connected unconfigured unknown
c9 scsi-bus connected configured unknown
root@sdwg11 # psrinfo Jul 27 16:32:36 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
-vJul 27 16:32:36 sdwg11 last message repeated 1 time
Jul 27 16:32:36 sdwg11 unix: NOTICE: Scheduling removal of page 0x00000040.ffbea000
Jul 27 16:32:36 sdwg11 unix: NOTICE: Page 0x00000040.ffbea000 removed from service
psrinfo -v
Status of virtual processor 0 as of: 07/27/2015 16:32:38
on-line since 07/22/2015 17:21:27.
The sparcv9 processor operates at 900 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 1 as of: 07/27/2015 16:32:38
on-line since 07/22/2015 17:21:28.
The sparcv9 processor operates at 900 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 2 as of: 07/27/2015 16:32:38
on-line since 07/22/2015 17:21:28.
The sparcv9 processor operates at 900 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 3 as of: 07/27/2015 16:32:38
on-line since 07/22/2015 17:21:28.
The sparcv9 processor operates at 900 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 8 as of: 07/27/2015 16:32:38
on-line since 07/27/2015 16:31:39.
The sparcv9 processor operates at 1200 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 9 as of: 07/27/2015 16:32:38
on-line since 07/27/2015 16:31:46.
The sparcv9 processor operates at 1200 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 10 as of: 07/27/2015 16:32:38
on-line since 07/27/2015 16:31:52.
The sparcv9 processor operates at 1200 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 11 as of: 07/27/2015 16:32:38
on-line since 07/27/2015 16:31:58.
The sparcv9 processor operates at 1200 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 16 as of: 07/27/2015 16:32:38
on-line since 07/22/2015 17:21:28.
The sparcv9 processor operates at 1200 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 17 as of: 07/27/2015 16:32:38
on-line since 07/22/2015 17:21:28.
The sparcv9 processor operates at 1200 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 18 as of: 07/27/2015 16:32:38
on-line since 07/22/2015 17:21:28.
The sparcv9 processor operates at 1200 MHz,
and has a sparcv9 floating point processor.
Status of virtual processor 19 as of: 07/27/2015 16:32:38
on-line since 07/22/2015 17:21:28.
The sparcv9 processor operates at 1200 MHz,
and has a sparcv9 floating point processor.
root@sdwg11 # Jul 27 16:32:39 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
Jul 27 16:32:39 sdwg11 unix: NOTICE: Scheduling removal of page 0x00000040.ff9bc000
Jul 27 16:32:39 sdwg11 unix: NOTICE: Page 0x00000040.ff9bc000 removed from service
Jul 27 16:32:51 sdwg11 unix: WARNING: [AFT0] Most recent 3 soft errors from Memory Module /N0/SB2/P2/B0/D0 J15300 exceed threshold (N=2, T=24h:00m) triggering page retire
root@sdwg11 #
root@sdwg11 # prtconf
prtconf
System Configuration: Sun Microsystems sun4u
Memory size: 20480 Megabytes
System Peripherals (Software Nodes):
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