免费注册 查看新帖 |

Chinaunix

  平台 论坛 博客 文库
› 论坛 › 操作系统 › Solaris › SUN E3500 无法启动，串口信息已贴。
12345下一页
最近访问板块 发新帖
楼主: lixu
打印 上一主题 下一主题

SUN E3500 无法启动，串口信息已贴。 [复制链接]

metor78

论坛徽章:
0
31楼 [报告]
发表于 2006-09-17 09:29 |只看该作者
原帖由 lixu 于 2006-9-17 08:46 发表
谢谢metor大哥!
帖子我看了，谢谢!

能提供一个串口线的图片吗？
没见过，我得找找库房，看看有没有。
谢谢各位关注!

按照线序自己焊，一个是九孔的串口，一个是25针的串口。
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
lixu

论坛徽章:
0
32楼 [报告]
发表于 2006-09-17 09:38 |只看该作者
晕，要自己做啊？？？
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
metor78

论坛徽章:
0
33楼 [报告]
发表于 2006-09-17 09:45 |只看该作者
原帖由 lixu 于 2006-9-17 09:38 发表
晕，要自己做啊？？？

或者带着线序去找卖串口线的地方让人家给你焊也行。我一般是自己焊。
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
lixu

论坛徽章:
0
34楼 [报告]
发表于 2006-09-17 10:01 |只看该作者
哇塞，真复杂~~，我先去找找看有没有，要是没有也只能去买了~

谢谢
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
filtercai

论坛徽章:
0
35楼 [报告]
发表于 2006-09-17 16:23 |只看该作者
针的对应关系:
DB25(male)      DB9(Female)
      2                    2
      3                    3
      6                    4
      20                  6
      5                    7
      4                    8
      7                    5
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
zljcn

论坛徽章:
0
36楼 [报告]
发表于 2006-09-17 21:13 |只看该作者
几个CPU板子?
如果是多个,用排除法试试.
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
hgb1982

论坛徽章:
0
37楼 [报告]
发表于 2006-09-18 23:43 |只看该作者
还是要看串口输出再说吧，估计可能CPU板自检没过，
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
lixu

论坛徽章:
0
38楼 [报告]
发表于 2006-09-19 08:39 |只看该作者
我这正在找串口线，然后接上看看!
谢谢大家热心关注，谢谢。
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
lixu

论坛徽章:
0
39楼 [报告]
发表于 2006-10-14 20:04 |只看该作者

串口线信息

这些天太忙了，没顾上弄这个，今天做了条线，把信息贴出来，大家给看看。谢谢
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
lixu

论坛徽章:
0
40楼 [报告]
发表于 2006-10-14 20:07 |只看该作者


  3.         
  4. Hardware Power ON

  6. @(#) Ultra Enterprise 3.2 Version 19 created 1998/10/20 18:13
  7. CPU = 0000.0000.0000.000e
  8. Probing keyboard Done

  10. 7,0>
  11. 7,0>@(#) POST 3.9.8 1998/11/09 15:09
  12. 7,1>
  13. 7,0>
  14.     SelfTest Initializing (Diag Level 10, ENV 00004001) IMPL 0011 MASK 20
  15. 7,1>@(#) POST 3.9.8 1998/11/09 15:09
  16. 7,0>Board 7 CPU FPROM Test
  17. 7,1>
  18.     SelfTest Initializing (Diag Level 10, ENV 00000000) IMPL 0011 MASK 20
  19. 7,0>Board 7 Basic CPU Test
  20. 7,0>    Set CPU UPA Config and Init SDB Data
  21. 7,0>        SRAM Mode = 22, Clock Mode = 4:1, PCON = 6b3, MCAP = 0
  22. 7,0>Board 7 MMU Enable Test
  23. 7,0>    DMMU Init
  24. 7,0>    IMMU Init
  25. 7,0>    Mapping Selftest Enabling MMUs
  26. 7,0>Board 7 Ecache Test
  27. 7,0>    Ecache Probe
  28. 7,0>    Ecache Tags
  29. 7,1>Board 7 CPU FPROM Test
  30. 7,1>Board 7 Basic CPU Test
  31. 7,1>    Set CPU UPA Config and Init SDB Data
  32. 7,1>        SRAM Mode = 22, Clock Mode = 4:1, PCON = 6b3, MCAP = 0
  33. 7,1>Board 7 MMU Enable Test
  34. 7,1>    DMMU Init
  35. 7,1>    IMMU Init
  36. 7,1>    Mapping Selftest Enabling MMUs
  37. 7,1>Board 7 Ecache Test
  38. 7,1>    Ecache Probe
  39. 7,1>    Ecache Tags
  40. 7,0>    Ecache Quick Verify
  41. 7,1>    Ecache Quick Verify
  42. 7,0>    Ecache Init
  43. 7,1>    Ecache Init
  44. 7,0>    Ecache RAM
  45. 7,1>    Ecache RAM
  46. 7,0>    Ecache Address Line
  47. 7,0>    Configure Ecache Limit
  48. 7,0>Ecache Size = 00400000,  Limited to 00400000
  49. 7,0>Board 7 FPU Functional Test
  50. 7,0>    FPU Enable
  51. 7,0>Board 7 Board Master Select Test
  52. 7,0>    Selecting a Board Master
  53. 7,0>Board 7 FireHose Devices Test
  54. 7,1>    Ecache Address Line
  55. 7,1>    Configure Ecache Limit
  56. 7,1>Ecache Size = 00400000,  Limited to 00400000
  57. 7,1>Board 7 FPU Functional Test
  58. 7,1>    FPU Enable
  59. 7,1>Board 7 Board Master Select Test
  60. 7,1>    Selecting a Board Master
  61. 7,0>Board 7 Address Controller Test
  62. 7,0>    AC Initialization
  63. 7,0>    AC DTAG Init
  64. 7,0>Board 7 Dual Tags Test
  65. 7,0>    AC DTAG Init
  66. 7,0>Board 7 FireHose Controller Test
  67. 7,0>    FHC Initialization
  68. 7,0>WARNING FanFail State Machine Status at 000001ff.f0804010 is 00000001
  69. 7,0>Board 7 JTAG Test
  70. 7,0>    Verify System Board Scan Ring
  71. 7,0>Board 7 Centerplane Test
  72. 7,0>    Centerplane Join
  73. 7,0>Setting JTAG Master
  74. 7,0>Clear JTAG Master
  75. 7,0>Board 7 Setup Cache Size Test
  76. 7,0>    Setting Up Cache Size
  77. 7,0>Board 7 System Master Select Test
  78. 7,0>    Setting System Master
  79. 7,0>POST Master Selected (JTAG,CENTRAL)
  80. 7,0>Board 16 Clock Board Test
  81. 7,0>    Clock Board Initialization
  82. 7,0>    Clock Board Temperature Check
  83. 7,0>Board 16 Clock Board Serial Ports Test
  84. 7,0>Board 16 NVRAM Devices Test
  85. 7,0>    M48T59 (TOD) Init
  86. 7,0>Board 7 System Board Probe  Test
  87. 7,0>    Probing all CPU/Memory BDA
  88. 7,0>    Probing System Boards
  89. 7,0>    Probing CPU Module JTAG Rings
  90. 7,0>Setting System Clock Frequency
  91. 7,0>        CPU Module mid 14 Checked in OK (speed code = 7)
  92. 7,0>        CPU mid 15 Version=00170011.20000507
  93. 7,0>        CPU Module mid 15 Checked in OK (speed code = 7)
  94. 7,0> ******** Clock Reset - retesting
  95. 7,0>System Frequency (MHz),fcpu=336, fmod=168, fsys=84, fgen=336
  96. 7,0>
  97. 7,0>@(#) POST 3.9.8 1998/11/09 15:09
  98. 7,1>
  99. 7,0>
  100.     SelfTest Initializing (Diag Level 40, ENV 00004081) IMPL 0011 MASK 20
  101. 7,1>@(#) POST 3.9.8 1998/11/09 15:09
  102. 7,0>Board 7 CPU FPROM Test
  103. 7,1>
  104.     SelfTest Initializing (Diag Level 40, ENV 00004081) IMPL 0011 MASK 20
  105. 7,0>    CPU/Memory Board FPROM Checksum Test
  106. 7,1>Board 7 CPU FPROM Test
  107. 7,1>    CPU/Memory Board FPROM Checksum Test
  108. 7,0>Board 7 Basic CPU Test
  109. 7,0>    FPU Registers and Data Path Test
  110. 7,0>    Instruction Cache Tag RAM Test
  111. 7,1>Board 7 Basic CPU Test
  112. 7,1>    FPU Registers and Data Path Test
  113. 7,1>    Instruction Cache Tag RAM Test
  114. 7,0>    Instruction Cache Instruction RAM Test
  115. 7,1>    Instruction Cache Instruction RAM Test
  116. 7,0>    Instruction Cache Next Field RAM Test
  117. 7,1>    Instruction Cache Next Field RAM Test
  118. 7,0>    Instruction Cache Pre-decode RAM Test
  119. 7,1>    Instruction Cache Pre-decode RAM Test
  120. 7,0>    Data Cache RAM Test
  121. 7,1>    Data Cache RAM Test
  122. 7,0>    Data Cache Tags Test
  123. 7,1>    Data Cache Tags Test
  124. 7,0>    DMMU Registers Access Test
  125. 7,0>    DMMU TLB DATA RAM Access Test
  126. 7,0>    DMMU TLB TAGS Access Test
  127. 7,0>    IMMU Registers Access Test
  128. 7,1>    DMMU Registers Access Test
  129. 7,0>    IMMU TLB DATA RAM Access Test
  130. 7,1>    DMMU TLB DATA RAM Access Test
  131. 7,0>    IMMU TLB TAGS Access Test
  132. 7,1>    DMMU TLB TAGS Access Test
  133. 7,0>    Set CPU UPA Config and Init SDB Data
  134. 7,0>        SRAM Mode = 22, Clock Mode = 4:1, PCON = 6b3, MCAP = 0
  135. 7,1>    IMMU Registers Access Test
  136. 7,0>Board 7 MMU Enable Test
  137. 7,0>    DMMU Init
  138. 7,0>    IMMU Init
  139. 7,0>    Mapping Selftest Enabling MMUs
  140. 7,1>    IMMU TLB DATA RAM Access Test
  141. 7,0>Board 7 Ecache Test
  142. 7,0>    Ecache Probe
  143. 7,0>    Ecache Tags
  144. 7,1>    IMMU TLB TAGS Access Test
  145. 7,1>    Set CPU UPA Config and Init SDB Data
  146. 7,1>        SRAM Mode = 22, Clock Mode = 4:1, PCON = 6b3, MCAP = 0
  147. 7,1>Board 7 MMU Enable Test
  148. 7,1>    DMMU Init
  149. 7,1>    IMMU Init
  150. 7,1>    Mapping Selftest Enabling MMUs
  151. 7,1>Board 7 Ecache Test
  152. 7,1>    Ecache Probe
  153. 7,1>    Ecache Tags
  154. 7,0>    Ecache Quick Verify
  155. 7,1>    Ecache Quick Verify
  156. 7,0>    Ecache Init
  157. 7,1>    Ecache Init
  158. 7,0>    Ecache RAM
  159. 7,1>    Ecache RAM
  160. 7,0>    Ecache 6N RAM Pattern Test
  161. 7,1>    Ecache 6N RAM Pattern Test
  162. 7,0>    Ecache Address Line
  163. 7,0>    Configure Ecache Limit
  164. 7,0>Ecache Size = 00400000,  Limited to 00400000
  165. 7,0>Board 7 FPU Functional Test
  166. 7,0>    FPU Enable
  167. 7,0>Board 7 Board Master Select Test
  168. 7,0>    Selecting a Board Master
  169. 7,0>Board 7 FireHose Devices Test
  170. 7,0>    PROM Datapath Test
  171. 7,1>    Ecache Address Line
  172. 7,0>    FHC CPU SRAM Test
  173. 7,1>    Configure Ecache Limit
  174. 7,1>Ecache Size = 00400000,  Limited to 00400000
  175. 7,1>Board 7 FPU Functional Test
  176. 7,1>    FPU Enable
  177. 7,1>Board 7 Board Master Select Test
  178. 7,1>    Selecting a Board Master
  179. 7,0>Board 7 Address Controller Test
  180. 7,0>    AC Registers Test
  181. 7,0>    AC Initialization
  182. 7,0>    Memory Registers  Test
  183. 7,0>    Memory Registers Initialization Test
  184. 7,0>    AC DTAG Init
  185. 7,0>Board 7 Dual Tags Test
  186. 7,0>    AC DTAG Test
  187. 7,0>    AC DTAG Init
  188. 7,0>Board 7 FireHose Controller Test
  189. 7,0>    FHC Initialization
  190. 7,0>WARNING FanFail State Machine Status at 000001ff.f0804010 is 00000001
  191. 7,0>Board 7 JTAG Test
  192. 7,0>    Verify System Board Scan Ring
  193. 7,0>Board 7 Centerplane Test
  194. 7,0>    Centerplane and Arbiter Check Test
  195. 7,0>Setting JTAG Master
  196. 7,0>Clear JTAG Master
  197. 7,0>    Centerplane Join
  198. 7,0>Setting JTAG Master
  199. 7,0>Clear JTAG Master
  200. 7,0>Board 7 Setup Cache Size Test
  201. 7,0>    Setting Up Cache Size
  202. 7,0>Board 7 System Master Select Test
  203. 7,0>    Setting System Master
  204. 7,0>POST Master Selected (JTAG,CENTRAL)
  205. 7,0>Board 16 Clock Board Test
  206. 7,0>    Clock Board Registers Test
  207. 7,0>    Clock Board Initialization
  208. 7,0>    Clock Board Temperature Check
  209. 7,0>Board 16 Clock Board Serial Ports Test
  210. 7,0>    85C30 Register Test
  211. 7,0>    85C30 Serial Ports Test
  212. 7,0>        Keyboard Loopback
  213. 7,0>        Mouse Loopback
  214. 7,0>        Serial Port B Loopback
  215. 7,0>        Remote Serial Port A Loopback
  216. 7,0>        Remote Serial Port B Loopback
  217. 7,0>Board 16 NVRAM Devices Test
  218. 7,0>    M48T59 (TOD) Init
  219. 7,0>    M48T59 (TOD) Functional Part 1 Test
  220. 7,0>    NVRAM(Non-Destructive) Test
  221. 7,0>Board 7 System Board Probe  Test
  222. 7,0>    Probing all CPU/Memory BDA
  223. 7,0>    Probing System Boards
  224. 7,0>    Probing CPU Module JTAG Rings
  225. 7,0>Setting System Clock Frequency
  226. 7,0>        CPU Module mid 14 Checked in OK (speed code = 7)
  227. 7,0>        CPU mid 15 Version=00170011.20000507
  228. 7,0>        CPU Module mid 15 Checked in OK (speed code = 7)
  229. 7,0>System Frequency (MHz),fcpu=336, fmod=168, fsys=84, fgen=336
  230. 7,0>TESTING BOARD 1
  231. 7,0>Board 1 JTAG Test
  232. 7,0>    Verify System Board Scan Ring
  233. 7,0>Board 1 Centerplane Test
  234. 7,0>    Centerplane Check
  235. 7,0>Board 1 Address Controller Test
  236. 7,0>    AC Registers Test
  237. 7,0>    AC Initialization
  238. 7,0>Setting Freq to 25MHZ
  239. 7,0>    Memory Registers  Test
  240. 7,0>    Memory Registers Initialization Test
  241. 7,0>    AC DTAG Init
  242. 7,0>Board 1 FireHose Controller Test
  243. 7,0>    FHC Initialization
  244. 7,0>WARNING FanFail State Machine Status at 000001c4.f8804010 is 00000001
  245. 7,0>Board 1 NVRAM Devices Test
  246. 7,0>    M48T59 (TOD) Init
  247. 7,0>    M48T59 (TOD) Functional Part 1 Test
  248. 7,0>    NVRAM(Non-Destructive) Test
  249. 7,0>Re-mapping to Local Device Space
  250. 7,0>Begin Central Space Serial Port access
  251. 7,0>Enable AC Control Parity
  252. 7,0>Hotplug Trigger Test
  253. 7,0>Init Counters for Hotplug
  254. 7,0>Board 7 Cross Calls Test
  255. 7,0>    Cross Calls Test
  256. 7,0>Displaying PROM Versions
  257. 7,0>Slot 1 IO Type 4    FCODE 1.8.7 1997/12/8 15:39  iPOST 3.4.8 1998/10/27 12:24
  258. 7,0>Slot 7 CPU/Memory   OBP   3.2.19 1998/10/20 18:13  POST  3.9.8 1998/11/9 15:09
  259. 7,0>Board 7 Environmental Probe Test
  260. 7,0>    Environmental Probe
  261. 7,0>Checking Power Supply Configuration
  262. 7,0>Power is less than adequate, load 2 ps 0
  263. 7,0>WARNING Illegal Power Supply Configuration
  264. 7,0>WARNING Setting Board 1 to Low Power Mode
  265. 7,0>
  266. 7,0>        System Environmental Status
  267. 7,0>-----------------------------------------------------------------
  268. 7,0> Slot  Board Type    Temp   PS Stat      Perph PS
  269. 7,0>-----------------------------------------------------------------
  270. 7,0>  0  | Empty       |      |            | PP0 OK     |
  271. 7,0>  1  | Empty       |      | PS1 FAIL   | PP1 N_PRES |
  272. 7,0>  2  | Empty       |      |            |            |
  273. 7,0>  3  | Empty       |      | PS3 FANFAIL|            |
  274. 7,0>  4  | Empty       |      |            |            |
  275. 7,0>  5  | Empty       |      | PS5 N_PRES |            |
  276. 7,0>  6  | Empty       |      |            |            |
  277. 7,0>  7  |+CPU/Memory  | <54  |            |            |
  278. 7,0>  8  | Empty       |      |            |            |
  279. 7,0>  9  | Empty       |      |            |            |
  280. 7,0> 16  | Clock Board | <36  |            |            |
  281. 7,0>-----------------------------------------------------------------
  282. 7,0>
  283. 7,0>        Precharge and Peripheral Power Supply Status
  284. 7,0>-----------------------------------------------------------------
  285. 7,0> V5_PCH   V3_PCH   V12_PCH  V5_PPCH  V5_AUX   V12_P    V5_P
  286. 7,0>-----------------------------------------------------------------
  287. 7,0> OK     | OK     | OK     | OK     | OK     | OK     | OK     |
  288. 7,0>-----------------------------------------------------------------
  289. 7,0>
  290. 7,0>        Miscellaneous Sensor Status
  291. 7,0>-----------------------------------------------------------------
  292. 7,0> RK_FAN   AC_FAN   KEY_FAN  CLK_33   CLK_50   NOT_BD_PRES
  293. 7,0>-----------------------------------------------------------------
  294. 7,0> OK     | OK     | OK     | OK     | OK     | ONE    |
  295. 7,0>-----------------------------------------------------------------
  296. 7,0>Reconfig memory due to POR or CLOCK RESET
  297. 7,0>Reconfig memory due to DIAG_LEVEL
  298. 7,0>Board 7 Probing Memory SIMMS Test
  299. 7,0>    Probe SIMMID
  300. 7,0>        Populated Memory Bank Status
  301. 7,0>                bd #        Size        Address        Way        Status
  302. 7,0>                7        256                        Normal
  303. 7,0>                7        256                        Normal
  304. 7,0>Board 7 Memory Configuration Test
  305. 7,0>    Memory Interleaving
  306. 7,0>        Total banks with 8MB SIMMs = 0
  307. 7,0>        Total banks with 32MB SIMMs = 2
  308. 7,0>        Total banks with 128MB SIMMs = 0
  309. 7,0>        Total banks with 256MB SIMMs = 0
  310. 7,0>        Overall memory default speed = 60ns
  311. 7,0>Do OPTIMAL INTLV
  312. 7,0>        Board 7 AC rev 5 RCTIME = 0 (Tras 71)
  313. 7,0>        Board 7 AC rev 5 RCTIME = 0 (Tras 71)
  314. 7,0>    Memory Refresh Enable
  315. 7,0>Board 7 SIMMs Test
  316. 7,0>    MP Memory SIMM Clear Test
  317. 7,0>        Memory Size is 512Mbytes
  318. 7,0>          CPU MID 15 clearing 00000000.00004000 to 00000000.10000000
  319. 7,0>          CPU MID 14 clearing 00000000.10000000 to 00000000.20000000
  320. 7,0>          CPU MID 14 clearing 00000000.00000000 to 00000000.00004000
  321. 7,0>    Memory Walking Rows and Columns Test
  322. 7,0>    MP Memory SIMM (6N RAM Patterns) Test
  323. 7,0>        Memory Size is 512Mbytes
  324. 7,0>          CPU MID 15 testing 00000000.00000000 to 00000000.10000000
  325. 7,0>          CPU MID 14 testing 00000000.10000000 to 00000000.20000000
  326. 7,0>    MP Memory SIMM (moving inverse) Test
  327. 7,0>        Memory Size is 512Mbytes
  328. 7,0>          CPU MID 15 testing 00000000.00000000 to 00000000.10000000
  329. 7,0>          CPU MID 14 testing 00000000.10000000 to 00000000.20000000
  330. 7,0>Slave CPU Functional Tests
  331. 7,0>         Slave CPU MID 15 started
  332. 7,1>Board 7 Functional CPU 1 Test
  333. 7,1>    Dcache Init
  334. 7,1>    Dcache Enable Test
  335. 7,1>    Dcache Functionality Test
  336. 7,1>    Ecache Stress Test
  337. 7,1>    Ecache Functional Test
  338. 7,1>    CPU Dispatch (Multi-Scalar) Test
  339. 7,1>    SPARC Atomic Instructions Test
  340. 7,1>    SPARC Prefetch Instructions Test
  341. 7,1>    CPU Softint Registers and Interrupts Test
  342. 7,1>    Uni-Processor Cache Coherence Test
  343. 7,1>    Branch Memory Test
  344. 7,1>    SDB ECC CE Test
  345. 7,1>    SDB ECC Uncorrectable Test
  346. 7,1>    FPU Instruction Test
  347. 7,0>Board 7 Functional CPU 0 Test
  348. 7,0>    Dcache Init
  349. 7,0>    Dcache Enable Test
  350. 7,0>    Dcache Functionality Test
  351. 7,0>    Ecache Stress Test
  352. 7,0>    Ecache Functional Test
  353. 7,0>    CPU Dispatch (Multi-Scalar) Test
  354. 7,0>    SPARC Atomic Instructions Test
  355. 7,0>    SPARC Prefetch Instructions Test
  356. 7,0>    CPU Softint Registers and Interrupts Test
  357. 7,0>    Uni-Processor Cache Coherence Test
  358. 7,0>    Branch Memory Test
  359. 7,0>    SDB ECC CE Test
  360. 7,0>    SDB ECC Uncorrectable Test
  361. 7,0>    FPU Instruction Test
  362. 7,0>SYSTEM LEVEL TESTING
  363. 7,0>Board 7 Cache Coherency Test
  364. 7,0>    Multi-Processor Cache Coherence Test
  365. 7,0>        Testing CPU MID 15
  366. 7,0>Probing for Disk System boards
  367. 7,0>Board 7 System Interrupts Test
  368. 7,0>    System Interrupts Test
  369. 7,0>ERROR: TEST=System Interrupts,SUBTEST=System Interrupts ID=1f.1
  370. 7,0>Component under test: Board 7 System Interrupt
  371. 7,0>Power Supply # 1 Failed
  372. 7,0>Checking Power Supply Configuration
  373. 7,0>Power is less than adequate, load 1 ps 0
  374. 7,0>WARNING Illegal Power Supply Configuration
  375. 7,0>Power is less than adequate, load 1 ps 0
  376. 7,0>WARNING Illegal Power Supply Configuration
  377. 7,0>Power is less than adequate, load 1 ps 0
  378. 7,0>WARNING Illegal Power Supply Configuration

复制代码


这就是今天看到的信息。
他不停的出现这两句信息，一直出，直到断开……




  3. 7,0>Power is less than adequate, load 1 ps 0
  4. 7,0>WARNING Illegal Power Supply Configuration

复制代码


大家帮忙看看吧，看样子是不是电源有问题？
实战分享：从技术角度谈机器学习入门| 【大话IT】RadonDB低门槛向MySQL集群下战书 | ChinaUnix打赏功能已上线！ | 新一代分布式关系型数据库RadonDB知多少？
12345下一页
返回列表 发新帖
高级模式
B Color Image Link Quote Code Smilies
您需要登录后才可以回帖 登录 | 注册

本版积分规则 发表回复

  

北京盛拓优讯信息技术有限公司. 版权所有 京ICP备16024965号-6 北京市公安局海淀分局网监中心备案编号：11010802020122 niuxiaotong@pcpop.com 17352615567
未成年举报专区
中国互联网协会会员  联系我们：huangweiwei@itpub.net
感谢所有关心和支持过ChinaUnix的朋友们 转载本站内容请注明原作者名及出处

清除 Cookies - ChinaUnix - Archiver - WAP - TOP