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把32根512M内存全部换成1G后出现问题,更换之前主机是好的。
Hardware Power On
Probing core system FRUs.. Done
Executing POST w/%o0 = 0000.0800.0101.4041
0:0>
0:0>@(#) Sun Fire[TM] V480/V490 POST 4.18.1 2005/06/13 11:47
/export/delivery/delivery/4.18/4.18.1/post4.18.0/Camelot/cstone/integrated (root)
0:0>Copyright ?2005 Sun Microsystems, Inc. All rights reserved
SUN PROPRIETARY/CONFIDENTIAL.
Use is subject to license terms.
0:0>Jump from OBP->POST.
0:0>Diag level set to MAX.
0:0>Verbosity level set to NORMAL.
0:0>
0:0>Start selftest...
0:0>CPUs present in system: 0:0 1:0 2:0 3:0
0:0>Test CPU(s)..... \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - Done
0:0>Init Scan/I2C..... \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | Done
0:0>Basic Memory Test..... / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / -
0:0>WARNING: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f0124e24
Trap Level 00000000.00000001
AFSR 00100004.000001ec
AFAR 00000010.001b0040
0:0>END_WARNING
\ | / - \ | / - \ | / - \ | / - \ | /
0:0>ERROR: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1 Bank 0 Dimm 3, J3000 side 1
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = DIMM failure Bank 0 DIMM 3 Pin 79
0:0>END_ERROR
0:0>
0:0>ERROR: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1 Bank 0 Dimm 3, J3000 side 1
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = DIMM failure Bank 0 DIMM 3 Pin 195
0:0>END_ERROR
0:0>
0:0>ERROR: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1 Bank 0 Dimm 2, J3001 side 1
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = DIMM failure Bank 0 DIMM 2 Pin 79
0:0>END_ERROR
0:0>
0:0>ERROR: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1 Bank 0 Dimm 2, J3001 side 1
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = DIMM failure Bank 0 DIMM 2 Pin 195
0:0>END_ERROR
0:0>
0:0>ERROR: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1 Bank 0 Dimm 2, J3001 side 1
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = ERROR: miscompare on mem test!
Address: 00000010.001b0040
Expected: 00000000.00000001
Observed: c7ffff8f.fffc07fe
0:0>END_ERROR
-
0:0>WARNING: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1 Bank 0 Dimm 2, J3001 side 1
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f0124e2c
Trap Level 00000000.00000001
AFSR 00100004.000000fb
AFAR 00000011.001b0040
0:0>END_WARNING
\ | / - \ | / - \ | / - \ | / - \ | / -
0:0>WARNING: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1 Bank 0 Dimm 2, J3001 side 1
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f0124e2c
Trap Level 00000000.00000001
AFSR 00100004.00000119
AFAR 00000012.001b0040
0:0>END_WARNING
\ | / - \ | / - \ | / - \ | / - \ | / -
0:0>WARNING: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1 Bank 0 Dimm 2, J3001 side 1
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f0124e2c
Trap Level 00000000.00000001
AFSR 00100004.000001ec
AFAR 00000013.001b0040
0:0>END_WARNING
\ | / - \ | / - \ | / - \ | / - \ | / -
0:0>ERROR: TEST = Data Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG =
*** Test Failed!! ***
0:0>END_ERROR
\ | / - \ | / - \ |
0:0>WARNING: TEST = Data Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f0124e2c
Trap Level 00000000.00000001
AFSR 00100004.000001ec
AFAR 00000030.001b0040
0:0>END_WARNING
/ - \ | / - \ | / - \ | / - \ | / - \ |
0:0>WARNING: TEST = Data Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f0124e2c
Trap Level 00000000.00000001
AFSR 00100004.00000076
AFAR 00000031.001b0040
0:0>END_WARNING
/ - \ | / - \ | / - \ | / - \ | / - \ |
0:0>WARNING: TEST = Data Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f0124e2c
Trap Level 00000000.00000001
AFSR 00100004.000000fb
AFAR 00000032.001b0040
0:0>END_WARNING
/ - \ | / - \ | / - \ | / - \ | / - \ |
0:0>WARNING: TEST = Data Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000063
Trap PC ffffffff.f0124e2c
Trap Level 00000000.00000001
AFSR 00100002.00000085
AFAR 00000033.001b0050
0:0>END_WARNING
/ - \ | / - \ | / - \ | / - \ | / - \
0:0>ERROR: TEST = Data Bitwalk on Slave 3
0:0>H/W under test = CPU3 Bank 3 Dimm 0, J8100 side 2
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = DIMM failure Bank 3 DIMM 0 Pin 135
0:0>END_ERROR
|
0:0>ERROR: TEST = Data Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG =
*** Test Failed!! ***
0:0>END_ERROR
/
1:0>ERROR: TEST = Check Mem Banks
1:0>H/W under test = CPU, Motherboard/Centerplane, I/O board, (system init)
1:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
1:0>MSG = Offline Bank 0.
1:0>END_ERROR
3:0>
3:0>ERROR: TEST = Check Mem Banks
3:0>H/W under test = CPU, Motherboard/Centerplane, I/O board, (system init)
3:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
3:0>MSG = Offline Bank 3.
3:0>END_ERROR
- \ | / - \ |
0:0>WARNING: TEST = Address Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f011b0b0
Trap Level 00000000.00000001
AFSR 00100004.000001e7
AFAR 00000011.00100000
0:0>END_WARNING
/ - \ | / - \ | / - \ | / - \ | / - \
0:0>ERROR: TEST = Address Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = Miscompare on Addr walk test!
Address: 00000011.00100000
Expected: ffffffff.ffffffff
Observed: c7ffff8f.fffc07fe
Dimm#: 2779096485
Addr Bit#: 6
0:0>END_ERROR
| / -
0:0>WARNING: TEST = Address Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f011b0b0
Trap Level 00000000.00000001
AFSR 00100004.000001fb
AFAR 00000012.00100000
0:0>END_WARNING
\ | / - \ | / - \ | / - \ | / - \ | /
0:0>ERROR: TEST = Address Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = Miscompare on Addr walk test!
Address: 00000012.00100000
Expected: ffffffff.ffffffff
Observed: c7ffff8f.fffc07fe
Dimm#: 2779096485
Addr Bit#: 6
0:0>END_ERROR
- \ |
0:0>WARNING: TEST = Address Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f011b0b0
Trap Level 00000000.00000001
AFSR 00100004.000001fb
AFAR 00000013.00100000
0:0>END_WARNING
/ - \ | / - \ | / - \ | / - \ | / - \
0:0>ERROR: TEST = Address Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = Miscompare on Addr walk test!
Address: 00000013.00100000
Expected: ffffffff.ffffffff
Observed: c7ffff8f.fffc07fe
Dimm#: 2779096485
Addr Bit#: 6
0:0>END_ERROR
|
0:0>ERROR: TEST = Address Bitwalk on Slave 1
0:0>H/W under test = CPU1, All CPU1 Memory
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG =
*** Test Failed!! ***
0:0>END_ERROR
/ - \ | / - \ | / - \ | / - \ | / - \ |
0:0>WARNING: TEST = Address Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f011b0b0
Trap Level 00000000.00000001
AFSR 00100004.000001ac
AFAR 00000030.00100000
0:0>END_WARNING
/ - \ | / - \ | / - \ | / - \ | / - \
0:0>ERROR: TEST = Address Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = Miscompare on Addr walk test!
Address: 00000030.00100000
Expected: ffffffff.ffffffff
Observed: dfffff8f.fffc07ff
Dimm#: 2779096485
Addr Bit#: 6
0:0>END_ERROR
| / -
0:0>WARNING: TEST = Address Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000063
Trap PC ffffffff.f011b0b0
Trap Level 00000000.00000001
AFSR 00100002.00000089
AFAR 00000031.00100010
0:0>END_WARNING
\ | / - \ | / - \ | / - \ | / - \ | /
0:0>ERROR: TEST = Address Bitwalk on Slave 3
0:0>H/W under test = CPU3 Bank 1 Dimm 1, J8101 side 1
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = DIMM failure Bank 1 DIMM 1 Pin 224
0:0>END_ERROR
0:0>
0:0>ERROR: TEST = Address Bitwalk on Slave 3
0:0>H/W under test = CPU3 Bank 1 Dimm 1, J8101 side 1
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = Miscompare on Addr walk test!
Address: 00000031.00100000
Expected: ffffffff.ffffffff
Observed: c7ffff8f.fffc07ff
Dimm#: 2779096485
Addr Bit#: 6
0:0>END_ERROR
- \ |
0:0>WARNING: TEST = Address Bitwalk on Slave 3
0:0>H/W under test = CPU3 Bank 1 Dimm 1, J8101 side 1
0:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000032
Trap PC ffffffff.f011b0b0
Trap Level 00000000.00000001
AFSR 00100004.00000036
AFAR 00000032.00100000
0:0>END_WARNING
/ - \ | / - \ | / - \ | / - \ | / - \
0:0>ERROR: TEST = Address Bitwalk on Slave 3
0:0>H/W under test = CPU3 Bank 1 Dimm 1, J8101 side 1
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG = Miscompare on Addr walk test!
Address: 00000032.00100000
Expected: ffffffff.ffffffff
Observed: c7ffff8f.fffc07ff
Dimm#: 2779096485
Addr Bit#: 6
0:0>END_ERROR
|
0:0>ERROR: TEST = Address Bitwalk on Slave 3
0:0>H/W under test = CPU3, All CPU3 Memory
0:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
0:0>MSG =
*** Test Failed!! ***
0:0>END_ERROR
/
3:0>ERROR: TEST = Check Mem Banks
3:0>H/W under test = CPU, Motherboard/Centerplane, I/O board, (system init)
3:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
3:0>MSG = Offline Bank 1.
3:0>END_ERROR
- \ | Done
0:0>Full CPU Test..... / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / Done
0:0>Memory Block..... - \
3:0>WARNING: TEST = Quick Block Mem Test
3:0>H/W under test = CPU3, All CPU3 Memory
3:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000063
Trap PC ffffffff.f0124fc4
Trap Level 00000000.00000001
AFSR 00100002.0000004c
AFAR 00000000.00586ac0
3:0>END_WARNING
3:0>
3:0>ERROR: TEST = Quick Block Mem Test
3:0>H/W under test = CPU0 Bank 0 Dimm 1, J2901 side 1
3:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
3:0>MSG = DIMM failure Bank 0 DIMM 1 Pin 136
3:0>END_ERROR
3:0>
3:0>ERROR: TEST = Quick Block Mem Test
3:0>H/W under test = CPU3, All CPU3 Memory
3:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
3:0>MSG =
*** Test Failed!! ***
3:0>END_ERROR
1:0>
1:0>WARNING: TEST = Quick Block Mem Test
1:0>H/W under test = CPU1, All CPU1 Memory
1:0>MSG = Data or Instruction Access Error,
Trap Type 00000000.00000063
Trap PC ffffffff.f0124fb0
Trap Level 00000000.00000001
AFSR 00100002.0000004c
AFAR 00000000.00586ac0
1:0>END_WARNING
1:0>
1:0>ERROR: TEST = Quick Block Mem Test
1:0>H/W under test = CPU0 Bank 0 Dimm 1, J2901 side 1
1:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
1:0>MSG = DIMM failure Bank 0 DIMM 1 Pin 136
1:0>END_ERROR
1:0>
1:0>ERROR: TEST = Quick Block Mem Test
1:0>H/W under test = CPU1, All CPU1 Memory
1:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
1:0>MSG =
*** Test Failed!! ***
1:0>END_ERROR
| / - \ | / - \ | / - \ | / - \ | / - \ | / - \ | / - \xxxx
1:0>ERROR: Unexpected Trap!
1:0>H/W under test = Safari bus CPU 1, Motherboard/Centerplane
1:0>Repair Instructions: Replace items in order listed by 'H/W under test' above.
1:0>END_ERROR
1:0>CPU 1 trap trace.
1:0> tl tt tstate tpc tnpc
1:0> 00 32 00000099.58001604 ffffffff.f011e884 ffffffff.f011e888
1:0> 01 80 00000044.15001400 ffffffff.f0134460 ffffffff.f0134464
1:0> 02 00 00000000.00000000 00000000.00000000 00000000.00000000
1:0> 03 00 00000000.00000000 00000000.00000000 00000000.00000000
1:0> 04 00 00000000.00000000 00000000.00000000 00000000.00000000
1:0>AFAR=00000011.00000000
1:0>Clearing trap table.
1:0>Invoking debug menu...
1:0> 0 Peek/Poke interface
1:0> 1 Dump DAR Error Bits
1:0> 2 Dump Scan Chain
1:0> 3 Dump CPU Regs
1:0> 4 Dump BBC Regs
1:0> 5 Dump Mem Controller Regs
1:0> 6 Dump Valid DMMU entries
1:0> 7 Dump IMMU entries
1:0> 8 Dump Struct Info
1:0> 9 Dump Mailbox
1:0> a Dump IO-Bridge regs unit 0
1:0> b Dump IO-Bridge regs unit 1
1:0> c Allow other CPUs to print
1:0> d Do soft reset
1:0> ? Help
1:0>
1:0>Selection: |
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