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gs80故障,请高手帮忙查看,定位故障
log如下
~I~ Auto fault recovery to start in approx. 20 seconds
~I~ QBB2/PSM32 SysEvent: CPU_SYNC_INIT Reg0:7EBF Reg1:3FFF
~I~ Auto Fault restart
Slave10 already ON or transitioning to ON
QBB-1 Resetting
QBB-2 Resetting
QBB1 now Testing Step-0
QBB2 now Testing Step-0.
~I~ QBB1/PSM31 SysEvent: QBB_PULSE_RESET Reg0:7AB3 Reg1:0FFF (test-0) (fts/fmask:8f)
~I~ QBB1/PSM31 SysEvent: QBB_INIT_CD1 Reg0:7AB3 Reg1:0FFF (test-0) (fts/fmask:8f)
~I~ QBB2/PSM32 SysEvent: QBB_PULSE_RESET Reg0:7EBF Reg1:3FFF (test-0) (fts/fmask:8f)
~I~ QBB2/PSM32 SysEvent: QBB_INIT_CD1 Reg0:7EBF Reg1:3FFF (test-0) (fts/fmask:8f)
Phase 0
~I~ QbbConf(gp/io/c/m)=00000fb0 Assign=06 SQbb0=02 PQbb=02 SoftQbbId=00000890
~I~ SysConfig: 00 00 00 00 00 00 00 00 00 00 33 ff 03 ff 00 00
.........
QBB1 now Testing Step-1........
QBB2 now Testing Step-1......
~E~ QBB1 Error:
~E~ PUP MEM1 NO COMPL. ST
~~~~ QBB1-Cpu0InitialConnErr
QBB1 Step(s)-1 2 3 4 5 Tested
~~~~ QBB1-Cpu1InitialConnErr
~~~~ QBB1-Cpu2InitialConnErr
~~~~ QBB1-Cpu3InitialConnErr
..............................................
Local escape sequence verified
SCM_E0> .
SCM_E0>
SCM_E0>
SCM_E0> .show. .c.sb
CSB Type Firmware Revision FSL Revision Power State
10 PBM V06.4 (12.10/14:02) V5.6 (05.31) ON
31 PSM V06.4 (12.10/14:02) V5.6 (05.31) ON SrvSw: NORMAL
31 XSROM V06.4 (12.10/15:23)
C4 CPU0/SROM V7.0-7 ON
C5 CPU1/SROM V7.0-7 ON
C6 CPU2/SROM V7.0-7 ON
C7 CPU3/SROM V7.0-7 ON
32 PSM V06.4 (12.10/14:02) V5.6 (05.31) ON SrvSw: NORMAL
32 XSROM V06.4 (12.10/15:23)
C8 CPU0/SROM T15.6-5 ON
C9 CPU1/SROM T15.6-5 ON
CA CPU2/SROM T15.6-5 ON
CB CPU3/SROM T15.6-5 ON
C8 IOR0 ON
C9 IOR1 ON
E0 SCM MASTER V06.4 (12.10/14:03) V5.6 (05.31) ON
SCM_E0> ...
QBB2 now Testing Step-2....sho.w sys.tem
QBB2 now Testing Step-3
System Primary QBB0 : 2
System Primary CPU : 0 on QBB2
Par hrd/csb CPU Mem IOR3 IOR2 IOR1 IOR0 GP QBB Dir PS Temp
QBB# 3210 3210 (pci_box.rio) Mod BP Mod 321 (篊)
(-) 1/31 FFFF PPPF --.- --.- --.- --.- P P P P-P 26.5
(-) 2/32 PPPP PPPP --.- --.- P0.1 P0.0 P P P PPP 23.5
PCI Rise1-1 Rise1-0 Rise0-1 Rise0-0 RIO PS Temp
Cab 7 6 5 4 3 2 1 7 6 5 4 3 2 1 1 0 21 (篊)
10 - - M M - - M - - M M L M S * * PP 30.0
SCM_E0> ......
QBB2 now Testing Step-4.
QBB2 now Testing Step-5
Phase 1
QBB2 IO_MAP2: 0000A0C001333333
~I~ QbbConf(gp/io/c/m)=00000f80 Assign=06 SQbb0=02 PQbb=02 SoftQbbId=00000890
~I~ SysConfig: 00 00 00 00 00 00 00 00 00 00 33 ff 03 e0 00 00
SCM_E0>
QBB2 now Testing Step-6
QBB1 Step(s)-5 6 Tested.
QBB2 now Testing Step-7...........
QBB2 now Testing Step-B.
~I~ QBB2/PSM32 SysEvent: FAULT_RECOVERY Reg0:7EBF Reg1:3FFF (test-35) (fts/fmask:cf)
~W~ Fault w/ Flt mask disabled. Power on to be stopped.
Fault Entity: QSA
~~~~ QBB2-Cpu0TestHang Test:35 Subtest:1 QbbUnderTest:1
SCM_E0>
~E~ QBB2 Error:
~~~~ QBB2-Cpu1InitialConnErr
SCM_E0>
Phase 2
QBB2 IO_MAP2: 0000A0C001333333
~I~ SysConfig: 00 00 00 00 00 00 00 00 00 00 33 fc 03 e0 00 00
SCM_E0>
QBB1 Step(s)-C Tested.
QBB2 now Testing Step-C...
~E~ QBB2 Error:
~~~~ QBB2-Cpu2InitialConnErr
SCM_E0>
~~~~ QBB2-Cpu3InitialConnErr
SCM_E0>
Phase 3~I~ SysConfig: 00 00 00 00 00 00 00 00 00 00 33 f0 03 e0 00 00
SCM_E0>
QBB1 Step(s)-C D Tested
QBB2 Step(s)-C D Tested
QBB2 IO_MAP2: 0000A0C001333333
Phase 4
QBB2 unloading console across port0 from PCI Box-0
Console COM1 from master PCI Box-0
~I~ SysConfig: 00 00 00 00 00 00 00 00 00 00 33 f0 03 e0 00 00
Retrieving FRU information for Shared RAM...(please wait)
SCM_E0>
Power On Complete
Returning to system COM1 port
Power ON Summary:
~E~ QBB1 CPU0 FAILURE
~E~ QBB1 CPU1 FAILURE
~E~ QBB1 CPU2 FAILURE
~E~ QBB1 CPU3 FAILURE
~E~ QBB1 MEM0 FAILURE
~E~ QBB2 CPU0 FAILURE
~E~ QBB2 CPU1 FAILURE
~E~ QBB2 CPU2 FAILURE
~E~ QBB2 CPU3 FAILURE
System Primary QBB0 : 2
System Primary CPU : 0 on QBB2
Par hrd/csb CPU Mem IOR3 IOR2 IOR1 IOR0 GP QBB Dir PS Temp
QBB# 3210 3210 (pci_box.rio) Mod BP Mod 321 (篊)
(-) 1/31 FFFF PPPF --.- --.- --.- --.- P P P P-P 26.0
(-) 2/32 FFFF PPPP --.- --.- P0.1 P0.0 P P P PPP 23.0
PCI Rise1-1 Rise1-0 Rise0-1 Rise0-0 RIO PS Temp
Cab 7 6 5 4 3 2 1 7 6 5 4 3 2 1 1 0 21 (篊)
10 - - M M - - M - - M M L M S * * PP 30.0
~I~ Auto fault recovery to start in approx. 20 seconds
~I~ QBB2/PSM32 SysEvent: CPU_SYNC_INIT Reg0:7EBF Reg1:3FFF
Local escape sequence verified
SCM_E0>
~I~ Auto Fault restart
Slave10 already ON or transitioning to ON
QBB-1 Resetting
QBB-2 Resetting
SCM_E0>
QBB1 now Testing Step-0
QBB2 now Testing Step-0.
~I~ QBB1/PSM31 SysEvent: QBB_PULSE_RESET Reg0:7AB3 Reg1:0FFF (test-0) (fts/fmask:8f)
SCM_E0>
~I~ QBB1/PSM31 SysEvent: QBB_INIT_CD1 Reg0:7AB3 Reg1:0FFF (test-0) (fts/fmask:8f)
SCM_E0>
~I~ QBB1/PSM31 SysEvent: FAULT_RECOVERY Reg0:7AB3 Reg1:0FFF (test-0) (fts/fmask:8f)
~W~ Qbb1 marked as failed due to the fault..continuing poweron
Fault Entity: QSA
SCM_E0>
~I~ QBB1/PSM31 SysEvent: QBB_RESET_ON Reg0:7AB3 Reg1:0FFF (test-0) (fts/fmask:82)
SCM_E0>
~I~ QBB2/PSM32 SysEvent: QBB_PULSE_RESET Reg0:7EBF Reg1:3FFF (test-0) (fts/fmask:8f)
SCM_E0>
~I~ QBB2/PSM32 SysEvent: QBB_INIT_CD1 Reg0:7EBF Reg1:3FFF (test-0) (fts/fmask:8f)
SCM_E0>
Phase 0
~I~ QbbConf(gp/io/c/m)=00000700 Assign=00 SQbb0=02 PQbb=02 SoftQbbId=00000800
~I~ SysConfig: 00 00 00 00 00 00 00 00 00 00 30 ff 00 00 00 00
SCM_E0> ....p.owe.r .off.
~I~ CLI initiated power off
~E~ PrepPOff2 failure(1)
Powering off PCI Box 0
QBB-1 Powering OFF
~E~ PowerTransition Packet Failure:40
.SCM_E0>
QBB2 now Testing Step-0
~I~ QBB1/PSM31 SysEvent: QBB_POWER_OFF Reg0:7AB3 Reg1:0FFF
SCM_E0> .....
QBB2 now Testing Step-1.............................................................
QBB2 now Testing Step-2.......
QBB2 now Testing Step-3.....
QBB2 now Testing Step-4..
QBB2 now Testing Step-5
SCM_E0>
SCM_E0>
SCM_E0>
SCM_E0>
SCM_E0>
SCM_E0> show csb
CSB Type Firmware Revision FSL Revision Power State
10 PBM V06.4 (12.10/14:02) V5.6 (05.31) VAUX
31 PSM V06.4 (12.10/14:02) V5.6 (05.31) VAUX SrvSw: NORMAL
31 XSROM V06.4 (12.10/15:23)
C4 CPU0/SROM V7.0-7 OFF
C5 CPU1/SROM V7.0-7 OFF
C6 CPU2/SROM V7.0-7 OFF
C7 CPU3/SROM V7.0-7 OFF
32 PSM V06.4 (12.10/14:02) V5.6 (05.31) ON SrvSw: NORMAL
32 XSROM V06.4 (12.10/15:23)
C8 CPU0/SROM V7.0-7 ON
C9 CPU1/SROM V7.0-7 ON
CA CPU2/SROM V7.0-7 ON
CB CPU3/SROM V7.0-7 ON
C8 IOR0 ON
C9 IOR1 ON
E0 SCM MASTER V06.4 (12.10/14:03) V5.6 (05.31) VAUX
SCM_E0> show system
System Primary QBB0 : 2
System Primary CPU : 0 on QBB2
Par hrd/csb CPU Mem IOR3 IOR2 IOR1 IOR0 GP QBB Dir PS Temp
QBB# 3210 3210 (pci_box.rio) Mod BP Mod 321 (篊)
(-) 1/31 pppp pppp --.- --.- --.- --.- p f p p-p 28.5
(-) 2/32 PPPP PPPP --.- --.- P0.1 P0.0 P P P PPP 24.0
PCI Rise1-1 Rise1-0 Rise0-1 Rise0-0 RIO PS Temp
Cab 7 6 5 4 3 2 1 7 6 5 4 3 2 1 1 0 21 (篊)
10 - - M M - - M - - M M L M S * * pp 30.5
SCM_E0> helpshow show
BAD CMD ELEMENT entered
SCM_E0> show ?
SCM_E0> help
SCM CLI Version 1.0 2000/27/07
build <fru> <pn> <sn> <mod> <ali> Build FRU data
build EEPROM Restore EEPROM RMC default values
clear {alert, error <fru>, port} Clear alert state, clear fru errors, clear COM1 port comm
deposit [-ipr, -spr, (-iic,-offset),&mn, &p<csb_adr>, -next <n>, -q, -l, -w, -b] [data]
Write data to a memory location or CSR/IPR
disable {alert, remote, test <n>} Disable remote dial-in, alert dial-out, test-n
el Type out event log
enable {alert, remote, test <n>} Enable remote dial-in, alert dial-out, test-n
erase Erase screen
examine [-ipr, -spr, (-iic,-offset),&mn, &p<csb_adr>, -next <n>, -q, -l, -w, -b]
Read a memory location or CSR/IPR
fault [-all, -partition <n>] Create a system wide FAULT condition
halt {in,out} [-partition <n>,-all]Halt the system(virtual OCP halt button)
hangup Terminate remote session
help or ? Display list of SCM commands
init Initialize the modem
master <cli cmd> Slave SCM command to master SCM
power {on, off} [-all, -partition <n>]
Power command
quit Switch from SCM-CLI mode COM1 port
reset [-all, -partition <n>] System level reset
set flow {com1,local,modem} {hard,soft,both,none}
Set a port's flow control characteristic
set baud {com1,local,modem} <value> Set a port's baud rate
set com1_mode {through,snoop,soft_bypass,firm_bypass,local}
Set COM1 operating mode
show {csb,system,status,fru,nvr} Show various system information
test {alert, &pc<n> test_num} Trigger an alert or run a CPU test
update -csb <node_address,...> Update micro FLASH on CSB node(s)
SCM_E0> show fru
FRUname E Part# Serial# Model/Other Alias/Misc
PBP0 00 54-25027-01.E03 SM04016038 .......... ................
PBP0.SIO 80 B4190-BA.B04 SM04002568 .......... ................
PBP0.RIO0 00 B4171-AD.A01 SM02702485 .......... ................
PBP0.RIO1 00 B4171-AD.A01 AY05202746 .......... ................
QBB1 00 54-30630-01.B1 JA32400977 .......... ................
QBB1.PSM 00 54-25074-02.B02 JA30600140 .......... ................
QBB1.PWR 00 54-25017-02.B2 JA30203581 .......... ................
QBB1.AUX 00 54-25123-01.E02 JA25101703 .......... ................
QBB1.CPU0 80 B4125-AC.A07 AY05104474
QBB1.CPU1 80 B4125-AC.A07 AY13202424
QBB1.CPU2 80 B4125-AC.A05 SM01000629
QBB1.CPU3 80 B4125-AC.A07 AY12115040
QBB1.MEM0 80 B4150-AA.E6 JA33001416 .......... ................
QBB1.MEM0.DIM0 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM0.DIM1 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM0.DIM2 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM0.DIM3 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM1 80 B4150-AA.E6 JA33001330 .......... ................
QBB1.MEM1.DIM0 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM1.DIM1 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM1.DIM2 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM1.DIM3 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM2 80 B4150-AA.E6 JA33001345 .......... ................
QBB1.MEM2.DIM0 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM2.DIM1 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM2.DIM2 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM2.DIM3 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB1.MEM3 80 B4150-AA.E03 AY12803126 .......... ................
QBB1.MEM3.DIM0 00 HYS72V32120WR-8 AY942! 94 20-
QBB1.MEM3.DIM1 00 HYS72V32120WR-8 AY033! PTD 20-.......... ................
QBB1.MEM3.DIM2 00 HYS72V32120WR-8 AY941! P77 20-
QBB1.MEM3.DIM3 00 HYS72V32120WR-8 AY947! 0WK 20-
QBB1.DIR 80 B4140-AA.E03 JA30604022 .......... ................
QBB2 80 54-30354-03.B01 AY04803182
QBB2.PSM 00 54-25074-02.L01 SM03714828
QBB2.PWR 00 54-25017-02.A01 SM03507572 .......... ................
QBB2.AUX 00 54-25123-01.E01 SM03202819 .......... ................
QBB2.CPU0 80 B4125-AC.A06 AY12804227 .......... ................
QBB2.CPU1 80 B4125-AC.A06 AY12804094 .......... ................
QBB2.CPU2 80 B4125-AC.A06 AY12804215 .......... ................
QBB2.CPU3 80 B4125-AC.A06 AY12804067 .......... ................
QBB2.MEM0 80 B4150-AA.E03 AY13012064 .......... ................
QBB2.MEM0.DIM0 00 71V32D755AT4-P NI601D&00] 20-.......... ................
QBB2.MEM0.DIM1 00 71V32D755AT4-P NI601D&00X 20-.......... ................
QBB2.MEM0.DIM2 00 71V32D755AT4-P NI601D&00[ 20-.......... ................
QBB2.MEM0.DIM3 00 71V32D755AT4-P NI601D&00\ 20-.......... ................
QBB2.MEM1 80 B4150-AA.E03 AY13012081 .......... ................
QBB2.MEM1.DIM0 00 71V32D755AT4-P NI601D&00- 20-.......... ................
QBB2.MEM1.DIM1 00 71V32D755AT4-P NI601D&00[ 20-.......... ................
QBB2.MEM1.DIM2 00 71V32D755AT4-P NI601D&00Z 20-.......... ................
QBB2.MEM1.DIM3 00 71V32D755AT4-P NI601D&00[ 20-.......... ................
QBB2.MEM2 80 B4150-AA.E03 AY13012178 .......... ................
QBB2.MEM2.DIM0 00 71V32D755AT4-P NI601D&00_ 20-.......... ................
QBB2.MEM2.DIM1 00 71V32D755AT4-P NI601D&00C 20-.......... ................
QBB2.MEM2.DIM2 00 71V32D755AT4-P NI601D&00- 20-.......... ................
QBB2.MEM2.DIM3 00 71V32D755AT4-P NI601D&00D 20-.......... ................
QBB2.MEM3 80 B4150-AA.E6 JA33001333 .......... ................
QBB2.MEM3.DIM0 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB2.MEM3.DIM1 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB2.MEM3.DIM2 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB2.MEM3.DIM3 00 TS512MDE310 ??b03 $ )L 20-.......... ................
QBB2.DIR 80 B4140-AA.E01 SM02700879
QBB2.DIR0.DIM0 00 54-25023-BA.A01 NI03712341 .......... ................
QBB2.DIR0.DIM1 00 54-25023-BA.A01 NI03712387 .......... ................
QBB2.DIR0.DIM2 00 54-25023-BA.A01 NI03712392 .......... ................
QBB2.DIR0.DIM3 00 54-25023-BA.A01 AY11808230 .......... ................
QBB2.IO01 00 B4172-AA.D01 AY04915174 .......... ................ |
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