- 论坛徽章:
- 16
|
回复 23# uliux
• Uncacheable (UC-) — Has same characteristics as the strong uncacheable (UC)
memory type, except that this memory type can be overridden by programming
the MTRRs for the WC memory type. This memory type is available in processor
families starting from the Pentium III processors and can only be selected through
the PAT.
• Write Combining (WC) — System memory locations are not cached (as with
uncacheable memory) and coherency is not enforced by the processor’s bus
coherency protocol. Speculative reads are allowed. Writes may be delayed and
combined in the write combining buffer (WC buffer) to reduce memory accesses.
If the WC buffer is partially filled, the writes may be delayed until the next
occurrence of a serializing event; such as, an SFENCE or MFENCE instruction,
CPUID execution, a read or write to uncached memory, an interrupt occurrence,
or a LOCK instruction execution. This type of cache-control is appropriate for
video frame buffers, where the order of writes is unimportant as long as the
writes update memory so they can be seen on the graphics display. See Section
11.3.1, “Buffering of Write Combining Memory Locations,” for more information
about caching the WC memory type. This memory type is available in the
Pentium Pro and Pentium II processors by programming the MTRRs; or in
processor families starting from the Pentiu
|
|