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自己搞明白了,这个是PCE Express配置空间中没有具体定义的,要设备自己去实现。在PCI Express System Architecture中的描述:
In PCI Express, each device "captures" (and remembers) its own Bus Number and Device Number contained in TLP header bytes 8-9 each time a configuration write (Type 0) is detected on its primary link. At reset, all bus and device numbers in the system revert to 0, so a device will not respond to transactions other than configuration cycles until at least one configuration write cycle (Type 0) has been performed. Note that the PCI Express protocol does not define a configuration space location where the device function is required to store the captured Bus Number and Device Number information, only that it must do it.
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在PCI Express Base Specification的2.2.9中有更详细的描述。这个需要设备自己在收到Configration Write的时候记录(CfgWr总是用ID-Routing的),后面使用;因为#Bus/#Device有可能动态改变,所以就要每次写的都都自动记录一下。
看来以前说的书要读三遍不是没有道理的,只是现在都是项目催着人走,看书的时候一目十行,浮躁啊。
[ 本帖最后由 Cyberman.Wu 于 2009-12-29 11:13 编辑 ] |
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