marvell上海新部门招聘software系列职位，wifi,linux，Android，manager&engineer

shang2010

根据我对外企的招聘风格推断，外企是不会拒绝优秀的应聘者的。

绝不会。。

fancyflora

回复 10# deltali


    本科也是可以的呀~~~


    Flora把Marvell的技术职位（招聘难度大）分享在Blog上---http://fancyflora1983.spaces.live.com/

     欢迎大家交流~~

fancyflora

回复 11# shang2010


    对的~~令人眼前一亮的Resume始终会被人特别眷顾的~~~

fancyflora

Platform Development and Integration Engineer

The candidate will be responsible for developing key technologies to build a complete platform solutions from bottom to top that covers various application frameworks including Android, Ubunut, Maemo, ChromiumOS etc. And he/she will also be responsible for integrating key components together, optimizing the performance and power for the whole platform to build a turnkey solution that includes various products such as MID, TablePC, netbook, smart DPF, PND etc. In other words, the candidate will face the challenges to integrate all necessary building blocks, develop new technologies for emergent usage scenarios and go thru whole product life cycle to create a real product.

The candidate is expected to have below qualifications:
•     Solid Linux or WinCE development experiences
•     Smart and fast learning
•     Strong programming and problem solving skills
•     Kernel/Driver experiences is a plus
•     Multimedia/Graphics integration and optimization is a plus
•     Java programming is a plus
•     Application framework experiences is a plus


http://fancyflora1983.spaces.live.com/

风中飞絮

想应聘那个R&D Manager,可惜没做过embbed application,这几年离技术越来越远了，怕是不合适咯。

fancyflora

回复 15# 风中飞絮


    Marvell的管理层都是技术型的。。。Technical Lead

    http://fancyflora1983.spaces.live.com/
  
    职位陆续招聘中·~~~

wander8848

marvell的面试开始了吗？

fancyflora

2009年的这个时候，Flora在忙着寻找Manager Design这个职位：
Job Title: Manager, Design
Location: Shanghai
Report to: Director located in US
Job Responsibility:
This position is in a leading edge fast growing US semiconductor company. As a local Design Manager, the individual will have the opportunity to build your local team for IP development and verification. The individual will lead the projects execution, and work closely with other product teams on ARM based embedded SoC products.
Responsibilities include:
1. Build, grow and manage a local team to work closely with US locations.
2. Work with architecture team to understand specification, define and execute the projects.
3. Verilog entry, Logic simulations, synthesis, linting, timing, silicon bring-up.
4. Work with FPGA/Emulation team to perform pre-silicon validation/debug at IP, full-chip and system levels, fullchip integration, and Silicon debug.
5. Documentation
6. Interface with software and integration team
Qualification:
1. MSEE with 6 years of ASIC design and verification experience, with at least 2 years of management experience. PHD is a plus.
2. Experienced with IP design and verification.
3. Hand-on experience with standard design flow and tools on various design phases, including documentation, coding, lint, version control and RTL/gate simulation.
4. Strong team building skill is required
5. Experience with SystemVerilog and VMM is a plus.
6. Must be able to communicate in both written and spoken English.
7. Good team work spirit and communication skill.
8. Strong leadership and problem solving skills

运作了一整年的职位，终于守得云开见日出。
现Flora需要为这个团队增加成员，Sr.ASIC engineer开始~JD未写，技术标准参照以上描述。

推荐简历发送至：  job_marvell@163.com

http://fancyflora1983.spaces.live.com


面试通知确实有点慢，但是2个星期没接到电话面试的话，简历应该就是没通过了····

wander8848

我的意思是接到电话面试了，电面的时候说如果可能的话，要3月底4月初要进行on-site面试。
但我现在还没收到通知，不知道是我没通过电面呢，还是on-site的面试通知还没发？

fancyflora

回复 19# wander8848

on-site interview已经开始了~~~职位仍然在陆续招聘中，数量不够，并且合适的太少·~~

new position---senior design engineer:

1. MSEE with 3+ years experience, PHD is a plus

2. Experienced with IP design, verification and SoC integration.

3. Hands-on experience with standard design flow and tools on various design phases, including documentation, coding, lint, version control and RTL/gate simulation.

4. Experience with SystemVerilog and VMM is a plus.

5. Must be able to communicate in both written and spoken English.

6. Good team work spirit and problem solving skills

Description:

This position is in a leading edge fast growing US semiconductor company. As a senior design engineer, the individual will have the opportunity to work closely with US team on exciting IPs on latest and greatest design methodology and flow.



Responsibility includes:

1. Participating architect, micro-architect, and execution of the projects.

2. RTL coding, Verification, Logic simulations, synthesis, timing, silicon bring-up, etc

3. Documentation

4. Work closely with FPGA team for pre-silicon prototyping.

5. Work closely with software team for driver developments

6. Traveling to US is not mandatory, but sometimes required



http://fancyflora1983.spaces.live.com/default.aspx