这句代码是啥意思？

seamountain82

str        r1, [r0], #-2048
arm汇编，应该是伪指令。。。

是
将r1中的内容存到r0表示的地址后，r0表示的地址减2048
还是
将r1中的内容存到r0表示的地址-2048的地址处
？

简而言之，是先减还是后减？在哪里可以查到相关参考？

谢谢指教

seamountain82

该代码位于 arch/arm/mm/proc-macros.S文件中
谢谢，最好给点相关资料学习一下。

回复 1# seamountain82

Tinnal

应该是“将r1中的内容存到r0表示的地址后，r0表示的地址减2048”
手册自己到google或baidu下吧。粘贴上来太大了。

PCliangtao

楼上正解...
   ARM的后索引偏移寻址方式...
   相当于 str r1, [r0] 然后再执行 sub r0,  r0, #2048.
   去下载arm architecture reference manul

seamountain82

我查过arm architecture reference manual，这句话的语法与arm指令格式不太一样，应该是伪指令，所以不知道去哪里查了，gcc手册里面也没有。
arm中的STR指令格式是这样的：
STR  <Rd>, [<Rn>, #<immed_5> * 4]
STR  <Rd>, [<Rn>, <Rm>]
STR  <Rd, [SP, #<immed_8> * 4]
显然，该指令与STR的三种格式均不符合。。。

我还是想知道这些东东应该去哪里查，是arm手册，还是gcc手册？都没有找到答案

回复 3# Tinnal

Tinnal

回复 5# seamountain82



A4.1.99 STR
Syntax
STR{<cond>} <Rd>, <addressing_mode>
where:
<cond> Is the condition under which the instruction is executed. The conditions are defined in The
condition field on page A3-3. If <cond> is omitted, the AL (always) condition is used.
<Rd> Specifies the source register for the operation. If R15 is specified for <Rd>, the value stored
is IMPLEMENTATION DEFINED. For more details, see Reading the program counter on
page A2-9.
<addressing_mode>
Is described in Addressing Mode 2 - Load and Store Word or Unsigned Byte on page A5-18.
It determines the I, P, U, W, Rn and addr_mode bits of the instruction.
The syntax of all forms of <addressing_mode> includes a base register <Rn>. Some forms also
specify that the instruction modifies the base register value (this is known as base register
write-back).

A5.2 Addressing Mode 2 - Load and Store Word or Unsigned Byte
There are nine formats used to calculate the address for a Load and Store Word or Unsigned Byte
instruction. The general instruction syntax is:
LDR|STR{<cond>}{B}{T} <Rd>, <addressing_mode>
where <addressing_mode> is one of the nine options listed below.
All nine of the following options are available for LDR, LDRB, STR and STRB. For LDRBT, LDRT, STRBT and STRBT,
only the post-indexed options (the last three in the list) are available. For the PLD instruction described in
PLD on page A4-90, only the offset options (the first three in the list) are available.
1. [<Rn>, #+/-<offset_12>]
See Load and Store Word or Unsigned Byte - Immediate offset on page A5-20.
2. [<Rn>, +/-<Rm>]
See Load and Store Word or Unsigned Byte - Register offset on page A5-21.
3. [<Rn>, +/-<Rm>, <shift> #<shift_imm>]
See Load and Store Word or Unsigned Byte - Scaled register offset on page A5-22.
4. [<Rn>, #+/-<offset_12>]!
See Load and Store Word or Unsigned Byte - Immediate pre-indexed on page A5-24.
5. [<Rn>, +/-<Rm>]!
See Load and Store Word or Unsigned Byte - Register pre-indexed on page A5-25.
6. [<Rn>, +/-<Rm>, <shift> #<shift_imm>]!
See Load and Store Word or Unsigned Byte - Scaled register pre-indexed on page A5-26.
7. [<Rn>], #+/-<offset_12>
See Load and Store Word or Unsigned Byte - Immediate post-indexed on page A5-28.
8. [<Rn>], +/-<Rm>
See Load and Store Word or Unsigned Byte - Register post-indexed on page A5-30.
9. [<Rn>], +/-<Rm>, <shift> #<shift_imm>
See Load and Store Word or Unsigned Byte - Scaled register post-indexed on page A5-31.


A5.2.8 Load and Store Word or Unsigned Byte - Immediate post-indexed
This addressing mode uses the value of the base register Rn as the address for the memory access.
If the condition specified in the instruction matches the condition code status, the value of the immediate
offset is added to or subtracted from the value of the base register Rn and written back to the base register
Rn. The conditions are defined in The condition field on page A3-3.

Syntax
[<Rn>], #+/-<offset_12>
where:
<Rn> Specifies the register containing the base address.
<offset_12> Specifies the immediate offset used with the value of Rn to form the address.

Operation
address = Rn
if ConditionPassed(cond) then
if U == 1 then
Rn = Rn + offset_12
else /* U == 0 */
Rn = Rn - offset_12

Usage
This addressing mode is used for pointer access to arrays with automatic update of the pointer value.

此外，在A3.11.4 Examples中有：
...
LDR R3, [R9], #4 ; Load R3 from R9, then R9 = R9 + 4
STR R2, [R5], #8 ; Store R2 to R5, then R5 = R5 + 8
...

BTW:你上面例的这种格式不是出自ARM公司的ARM Architecture Reference Manual，而是网友的ARM汇编总结，如果你比较严谨，那你应该到ARM公司注册个账号，然后下官方的"ARMv5 Architecture Reference Manual" <https://silver.arm.com/download/download.tm?pv=1073121>。我当前这份是google出来的<www.altera.com/literature/third-party/ddi0100e_arm_arm.pdf>。

Tinnal

别外，伪指令也能在ARM公司的网站上查到，请多用官方的资料，拿到一个芯片应该第一时间至官方查询能提供的资料，而不是baidu或chinaunix问人。