优龙PXA270 bootloader boot270 代码分析(一)

yanhc519

boot270.bin 是英特尔写的一个270的bootloader，优龙在此基础上修改了

阶段一

的主程序为src\main.s

;------------------------------------------------------------------------------

;

;  COPYRIGHT (C) 2000, 2001 Intel Corporation.

;

;  FILENAME: main.s

;

;  PURPOSE: This file contains the platform dependent startup code. This is

;           the first code to run in the system and is responsible for

;           dispatching the platform dependent low-level initialization code

;           to the POST initialization routine (PlatformMain()).

;

;  LAST MODIFIED: $Modtime: $

;------------------------------------------------------------------------------

;/**--------------文件信息--------------------------------------------------------------------------------

;**文   件   名: main.s

;**创   建   人: hzh

;**最后修改日期: 2005-11-28

;**描        述: PXA270的启动文件，

;**               

;*********************** ****************************************************************/

main.s（ADS工程中的是main_Flash.s，两个文件只有一个地方不同）中是平台相关（板级相关）的启动代码，bootloader首先运行这段代码，然后将控制权交给

阶段二boot270.c，其中PlatformMain()是主程序。

; 中断向量表

; 中断向量表

    b      Reset_Handler           ; Must be PIC

    ldr    pc, =Undefined_Handler

    ldr    pc, =SWI_Handler

    ldr    pc, =Prefetch_Handler

    ldr    pc, =Abort_Handler

    nop

    ldr    pc, =IRQ_Handler

    ldr    pc, =FIQ_Handler

 

Reset_Handler

 

   

;

; Put the processor into SVC mode with interrupts disabled (IRQ and FIQ).

; 进入特权模式，并进制IRQ和FIQ中断

    mrs    r14,CPSR                ; get the processor status

    bic    r14,r14,#CPSR_Mode_Mask

    orr    r14,r14,#(CPSR_Mode_SVC:OR:CPSR_Int_Mask)

    msr    cpsr_cf,r14             ; SVC 32 mode with interrupts disabled

44b0的start.S中是这样写的：

reset:

       /*

        * set the cpu to SVC32 mode

        */

       mrs  r0,cpsr

       bic   r0,r0,#0x1f

       orr   r0,r0,#0x13

       msr  cpsr,r0

 

     bl     xlli_read_SCR                               ; Read the SCR and LCDCR virtual register data     

xlli_xxx字样函数都定义在文件xlli_LowLev_Init.s中

IF :DEF: BOOTABLE                        ;如果定义了BOOTABLE这个变量，则将该工程代码作为Flash中的启动代码

            

       ;调用GPIO初始化程序      

    bl     xlli_GPIO_init                               ; Init the GPIO pins to xlli defaults

 

;SDRAM控制寄存器初始化

    mov    r3,  #5                                      ; SDRAM Buffer impedance strength

    bl     xlli_setBufImp                               ; Set SDRAM buffer Impedance   

 

    bl     xlli_mem_init                                ; Initialize the memory controller

执行流程：

1复位

2进入SVC mode

3 xlli_read_SCR

4 xlli_GPIO_init

5 xlli_setBufImp

6 xlli_mem_init

3 xlli_read_SCR

SCR为System Configuration Register，系统配置寄存器，整个这个函数的作用就是，获取组装SCR的值，SCR各位定义如下：

r1 bit	31:16	11	10	9	8	7	6	5	4	3	2	1	0
GPIO	LCD 16位数据	104	103	113	31	30	87	86	77	75	74	19	14
功能	LCD	Keypad		AC97			LCD					AC97

然后将其存放到RAM中，RAM的地址在xlli_Mainstone_defs.inc文件中定义：

; Address where system configuration data is stored

;

xlli_SCR_data        EQU     (0x5C03FFFC) ; Address in SRAM where system config data is stored

有LCD的时候r1= 0x00000D81=1101_1000_0001

无LCD的时候r1= 0x00000802=1000_0000_0010，0x00000800

（1）使能GPIO，不在睡眠状态

xlli_read_SCR   FUNCTION

;

;       Insure the RDH and PH bits on PXA27x must be clear to enable GPIO pins.

;       They are sticky bits so they must be set to clear them.

;

        ldr     r4, =xlli_PMRCREGS_PHYSICAL_BASE

        mov     r2, #(xlli_PSSR_PH | xlli_PSSR_RDH) ; Set the PH and RDH bits to enable all GPIOs

        str     r2, [r4, #xlli_PSSR_offset]         ; Enable all GPIO lines

xlli_Bulverde_defs.inc

xlli_PMRCREGS_PHYSICAL_BASE  EQU    0x40F00000

 

xlli_PSSR_offset        EQU     (0x04)  ; Power Manager Sleep Status Register

;

; POWER MANAGER register bit masks

;

xlli_PSSR_PH            EQU     (0x10)  ; Peripheral Control Hold

xlli_PSSR_RDH           EQU     (0x20)  ; Read Disable Hold

（2）对GPDR1，GPDR2，GPAF配置，来读取SCR的一部分（LCD的16位数据），以组装SCR

       步骤为，

先将原来的值保存起来，

将LCD的某些引脚配置成GPIO的输入，

然后读取状态信息，

最后再将原来的值恢复（由于没有堆栈，所以都是先在reg中存储数据）。

;

;       Get, and save the present GPIO settings for direction registers 0, 1 and 2

;

        ldr     r4,  =xlli_GPIOREGS_PHYSICAL_BASE  ; Get the GPIO registers base address

        ldr     r5,  [r4, #xlli_GPDR1_offset]      ; Save direction values for GPIOs [63:32]

        ldr     r6,  [r4, #xlli_GPDR2_offset]      ; Save direction values for GPIOs [95:64]

        ldr     r7,  [r4, #xlli_GAFR1_U_offset]    ; Save alt function values for GPIOs [63:48]

        ldr     r8,  [r4, #xlli_GAFR2_L_offset]    ; Save alt function values for GPIOs [79:64]

        ldr     r9,  [r4, #xlli_GAFR2_U_offset]    ; Save alt function values for GPIOs [95:80]

 

;       Clear the bits of those GPIOs we need to read as inputs and write back to the GPIO

;       direction registers. The alternate function bits also need to be cleared. For this

;       particular code sequence "Magic Numbers" are used for the bit clear masks.

;

;       To cut down on the number of registers used we'll do GPDR1 and GPDR2 now and take care of

;       GPDR0 (and it's alternate function bits) later. Because this code is usually run very early

;       in the boot sequence (before SDRAM is brought up) the code assumes there is no stack to

;       preserve the contents of the registers used.

;

        ldr     r2,  =0xFC000000                   ; Register clear mask for GPDR1

        bic     r1,  r5,  r2                       ; Clear the bits we need to read in GPDR1

        str     r1,  [r4, #xlli_GPDR1_offset]      ; Write direction values for GPIOs [63:32]

 

        ldr     r2,  =0x00C02FFF                   ; Register clear mask for GPDR2

        bic     r1,  r6,  r2                       ; Clear the bits we need to read in GPDR2

        str     r1,  [r4, #xlli_GPDR2_offset]      ; Write direction values for GPIOs [95:64]

bic     r1,  r5,  r2    把r5的对应r2为1的位清零，放到r1中

对GPDR1和GPDR2 （GPIO Direction Reg）进行操作，为LCD引脚，配置其输入输出

配置LCD的引脚

GPIO58-GPIO73、GPIO86、GPIO87为LCD的18位数据线（为什么一开始配置为输入？？）

GPIO74、75、76分别为FCLK（frame clk）、LCLK（Line clk）、PCLK（Pixel clk）

GPIO77为BIAS

GPIO14为VSYNC

GPIO19为CS

;       Clear the alternate function bits for the direction bits we need to look at.

;

        ldr     r2,  =0xFFF00000                   ; Register clear mask for GAFR1_U

        bic     r1,  r7,  r2                       ; Clear the alt func for bits we need to read in GAFR1_U

        str     r1,  [r4, #xlli_GAFR1_U_offset]    ; Write alt function values for GPIOs [63:48]

 

        ldr     r2,  =0x0CFFFFFF                   ; Register clear mask for GAFR2_L

        bic     r1,  r8,  r2                       ; Clear the alt func for bits we need to read in GAFR2_L

        str     r1,  [r4, #xlli_GAFR2_L_offset]    ; Write alt function values for GPIOs [79:64]

 

        ldr     r2,  =0x0000F000                   ; Register clear mask for GAFR2_U

        bic     r1,  r9,  r2                       ; Clear the alt func for bits we need to read in GAFR2_U

        str     r1,  [r4, #xlli_GAFR2_U_offset]    ; Write alt function values for GPIOs [95:80]

清零之后的功能为GPIO，以便读取状态信息，这是什么状态信息呢？？？LCD的16位数据。

在有LCD和没有LCD的情况下，分别是什么数据呢？

 

 

;       With the GPIO direction registers set, the Platform System Configuration Register is read

;       from GPIO bits 73:58 and are stored in SRAM.

;       This data is placed in the UPPER 16 BITS (31:16) of this register.

;

        ldr     r1,  [r4, #xlli_GPLR1_offset]      ; Get levels for GPIOs [63:32]

        mov     r1,  r1,  LSR #10                  ; Move the data 10 bits to the right

        ldr     r2,  [r4, #xlli_GPLR2_offset]      ; Get levels for GPIOs [95:64]

        mov     r3,  r2                            ; Save a copy for future reference

        mov     r2,  r2,  LSL #22                  ; Move the data 22 bits to the left

        orr     r1,  r1,  r2                       ; This places GPIO data bits [73:58] into bits [31:16]

        ldr     r2,  =0xFFFF0000                   ; Mask word

        and     r1,  r1,  r2                       ; Make sure the bottom 16 bits are clear

配置好GPIO的方向寄存器（还有功能寄存器）后，就可以读取SCR的一部分了，这部分为LCD的16为数据

#10+#22=32，将GPLR1（r1 63:32）的数据右移10位到低位，将GPLR2（r2，r3 95:64）的数据左移22位，两个或，正好是32位GPIO数据（73:42），取高16位正好为73:58，为16位的LCD数据总线上的数据。

16位LCD数据存储在r1的高16位

r1 bit	31:16	15:0
GPIO	LCD 16位数据	0
功能	LCD

 

;       Restore GPDR1, GPDR2, GAFR1_U, GAFR2_L and GAFR2_U to their original values

 

（3）对GPDR0，GPAF配置，来读取SCR的另一部分，以组装SCR

;       Configure GPDR0, GAFR0_L and GAFR0_U to pick up four status bits we need from this word

;       NOTE: The values in r1 and r4 must be preserved through this section of code.

;

        ldr     r5,  [r4, #xlli_GPDR0_offset]      ; Save direction values for GPIOs [31:0]

        ldr     r6,  [r4, #xlli_GAFR0_L_offset]    ; Save alt function values for GPIOs [15:0]

        ldr     r7,  [r4, #xlli_GAFR0_U_offset]    ; Save alt function values for GPIOs [31:16]

 

        ldr     r2,  =0xC0084000                   ; Register clear mask for GPDR0

        bic     r8,  r5,  r2                       ; Clear the bits we need to read in GPDR0

        str     r8,  [r4, #xlli_GPDR0_offset]      ; Write direction values for GPIOs [31:0]

;

;       Clear the alternate function bits for the direction bits we need to look at.

;

        ldr     r2,  =0x30000000                   ; Register clear mask for GAFR0_L

        bic     r8,  r6,  r2                       ; Clear the alt func for bits we need to read in GAFR0_L

        str     r8,  [r4, #xlli_GAFR0_L_offset]    ; Write alt function values for GPIOs [15:0]

 

        ldr     r2,  =0xF00000C0                   ; Register clear mask for GAFR0_U

        bic     r8,  r7,  r2                       ; Clear the alt func for bits we need to read in GAFR0_U

        str     r8,  [r4, #xlli_GAFR0_U_offset]    ; Write alt function values for GPIOs [31:16]

GPIO14为VSYNC       LCD

GPIO19为CS              LCD

GPIO30为ASDOUT    AC97

GPIO31为ASYNC       AC97

将GPIO14、19、30、31设为普通GPIO接口，以便读取状态信息。

 

        and     r2,  r3,  #0x2000                  ; isolate bit 77

        mov     r2,  r2,  LSR #9                   ; Move to bit position #4

 

        and     r8,  r3,  #0xC00                   ; Extract bits 75:74

        mov     r8,  r8,  LSR #8                   ; Move GPIO bits 75:74 to bit position 3:2

        orr     r2,  r2,  r8                       ; Save these two bits into r2

 

        and     r8,  r3,  #0xC00000                ; Extract bits 87:86

        mov     r8,  r8,  LSR #17                  ; Move GPIO bits 87:86 to bit position 6:5

        orr     r2,  r2,  r8                       ; Save these two bits into r2

 

        ldr     r3,  [r4, #xlli_GPLR0_offset]      ; Get levels for GPIOs [31:0]

        mov     r3,  r3,  LSR #14                  ; Allign GPIO bit 14 with bit position 0

        and     r8,  r3,  #0x1                     ; Extract this bit

        orr     r2,  r2,  r8                       ; OR this bit into r2

 

        mov     r3,  r3,  LSR #4                   ; move GPIO bit 19 into bit location 1

        and     r8,  r3,  #0x2                     ; extract this bit

        orr     r2,  r2,  r8                       ; OR this bit value into r2

 

        mov     r3,  r3,  LSR #5                   ; move GPIO bits 31:30 into bit locations 8:7

        and     r3,  r3,  #0x180                   ; isolate these bits

        orr     r2,  r2,  r3                       ; OR this bit value into r2

最后的各位组织

r2 bit	8	7	6	5	4	3	2	1	0
GPIO	31	30	87	86	77	75	74	19	14
功能	AC97		LCD					AC97

 

（4）对GPDR3、GAFR进行配置，来读取状态信息，组装SCR

;       Now we need to read status from GPIOs 103, 104 and 113

;

;       Configure GPDR3, GAFR3_L and GAFR3_U to pick up three status bits we need from this word

;       NOTE: The values in r1 and r4 must be preserved through this section of code.

;

        ldr     r5,  [r4, #xlli_GPDR3_offset]      ; Save direction values for GPIOs [127:96]

        ldr     r6,  [r4, #xlli_GAFR3_L_offset]    ; Save alt function values for GPIOs [111:96]

        ldr     r7,  [r4, #xlli_GAFR3_U_offset]    ; Save alt function values for GPIOs [127:112]

 

        ldr     r9,  =0x00020180                   ; Register clear mask for GPDR3

        bic     r8,  r5,  r9                       ; Clear the bits we need to read in GPDR3

        str     r8,  [r4, #xlli_GPDR3_offset]      ; Write direction values for GPIOs [127:96]

;

;       Clear the alternate function bits for the direction bits we need to look at.

;

        ldr     r9,  =0x0003C000                   ; Register clear mask for GAFR3_L

        bic     r8,  r6,  r9                       ; Clear the alt func for bits we need to read in GAFR3_L

        str     r8,  [r4, #xlli_GAFR3_L_offset]    ; Write alt function values for GPIOs [111:96]

 

        ldr     r9,  =0x0000000C                   ; Register clear mask for GAFR3_U

        bic     r8,  r7,  r9                       ; Clear the alt func for bits we need to read in GAFR3_U

        str     r8,  [r4, #xlli_GAFR3_U_offset]    ; Write alt function values for GPIOs [127:112]

        ldr     r3,  [r4, #xlli_GPLR3_offset]      ; Get levels for GPIOs [127:96]

;

;       Restore GPDR3, GAFR3_L and GAFR3_U to their original values

;

        str     r5,  [r4, #xlli_GPDR3_offset]      ; Restore direction values for GPIOs [127:96]

        str     r6,  [r4, #xlli_GAFR3_L_offset]    ; Restore alt function values for GPIOs [111:96]

        str     r7,  [r4, #xlli_GAFR3_U_offset]    ; Restore alt function values for GPIOs [127:112]

 

        mov     r3,  r3,  LSL #2                   ; Move GPIO bits 103:104 to bit locations 11:10

        and     r8,  r3,  #0xC00                   ; extract settings for bits 11:10

        orr     r2,  r2,  r8                       ; Add in to value for system config word

 

        mov     r3,  r3,  LSR #10                  ; Move GPIO bits 113 to bit location 9

        and     r8,  r3,  #0x400                   ; extract setting for bit 9

        orr     r2,  r2,  r8                       ; Add in to value for system config word

;

;       r2 now contains the SCR2 register data in bits 11:0

;       This value gets ORed with the SCR data in bits 31:16 of r1

;

        orr     r1,  r1,  r2                       ; Generate the data word to be stored

;

;       Update SRAM with the above data

;

        ldr     r4,  =xlli_SCR_data                ; Get SRAM address where data is to be stored

        str     r1,  [r4]                          ; Write the contents to SRAM

第一个左移，感觉应该左移3位

GPIO113为AC97_RESET

GPIO103、GPIO104为KB_MKOUT，Keypad Matrix Out

r2位组织为：

r2 bit	11	10	9	8	7	6	5	4	3	2	1	0
GPIO	104	103	113	31	30	87	86	77	75	74	19	14
功能	Keypad		AC97			LCD					AC97

 

r1 bit	31:16	15:0
GPIO	LCD 16位数据	0
功能	LCD

 

总结：最后r1和r2进行或运算为：

r1 bit	31:16	11	10	9	8	7	6	5	4	3	2	1	0
GPIO	LCD 16位数据	104	103	113	31	30	87	86	77	75	74	19	14
功能	LCD	Keypad		AC97			LCD					AC97