- 论坛徽章:
- 0
|
Done \r\n0>Interrupt Crosscall....Done \r\n0>Init Memory..../ \r\nSC Alert: SC Request to send Break to host. \r\n| \r\n ****** POST Running ****** \r\n\r\nDone \r\n0>PLL Reset....Done \r\n0>Init Memory....Done \r\n0>Test Memory....\\ \r\n0>ERROR: TEST = Data Bitwalk on Master \r\n0>H/W under test = MB/P0/B1/D0 (Bank 2), Motherboard \r\n0>Repair Instructions: Replace items in order listed by \'H/W under test\' above. \r\n0>MSG = Pin 114 failed on MB/P0/B1/D0 (Bank 2), Motherboard \r\n0>END_ERROR \r\n\r\n0> \r\n0>ERROR: TEST = Data Bitwalk on Master \r\n0>H/W under test = MB/P0/B1/D1 (Bank 2) \r\n0>Repair Instructions: Replace items in order listed by \'H/W under test\' above. \r\n0>MSG = Pin 2 failed on MB/P0/B1/D1 (Bank 2), Motherboard \r\n0>END_ERROR \r\n\r\n0> \r\n0>ERROR: TEST = Data Bitwalk on Master \r\n0>H/W under test = MB/P0/B1/D1 (Bank 2), Motherboard \r\n0>Repair Instructions: Replace items in order listed by \'H/W under test\' above. \r\n0>MSG = Pin 4 failed on MB/P0/B1/D1 (Bank 2), Motherboard \r\n0>END_ERROR \r\n\r\n0> \r\n0>ERROR: TEST = Data Bitwalk on Master \r\n0>H/W under test = MB/P0/B1/D1 (Bank 2), Motherboard \r\n0>Repair Instructions: Replace items in order listed by \'H/W under test\' above. \r\n0>MSG = ERROR: miscompare on mem test! \r\n Address: 00000002.001b0000 \r\n Expected: 00000000.00000000 \r\n Observed: 000000ff.00ffdb00 \r\n0>END_ERROR \r\n\r\n| \r\n0>ERROR: TEST = Data Bitwalk on Master \r\n0>H/W under test = CPU0 Memory \r\n0>Repair Instructions: Replace items in order listed by \'H/W under test\' above. \r\n0>MSG = \r\n *** Test Failed!! *** \r\n\r\n0>END_ERROR \r\n\r\n0> \r\n0>ERROR: TEST = Data Bitwalk on Master \r\n0>H/W under test = CPU0 Memory \r\n0>Repair Instructions: Replace items in order listed by \'H/W under test\' above. \r\n0>MSG = No good memory available on master CPU 0, rolling over to new Master. \r\n0>END_ERROR \r\n\r\nDone \r\n0>ERROR: \r\n\r\nSC Alert: DISK @ HDD0 has been inserted. \r\n0> POST toplevel status has the following failures: \r\n0> MB/P0/B1/D0 (Bank 2), Motherboard\r\n0> MB/P0/B1/D1 (Bank 2), Motherboard\r\n0>END_ERROR\r\n\r\n0>\r\n0>ERROR: No good CPUs OR CPUs with good memory left. Calling debug menu\r\nSC Alert: MB/P0/B1/D0 (Bank 2), Motherboard has been failed by POST\r\n\r\nSC Alert: MB/P0/B1/D1 (Bank 2), Motherboard has been failed by POST\r\n.\r\n0> 0 Peek/Poke interface\r\n0> 1 Dump CPU Regs\r\n0> 2 Dump Valid L2$\r\n0> 3 Dump Trap Table\r\n0> 4 Dump Mem Controller Regs\r\n0> 5 Dump Valid DMMU entries\r\n0> 6 Dump IMMU entries\r\n0> 7 Dump Mailbox\r\n0> 8 Dump IO-Bridge regs\r\n0> 9 Allow other CPUs to print\r\n0> a Do soft reset\r\n0> ? Help\r\n0>\r\n0>Selection: 帮我看看\n\n[ 本帖最后由 气氛弥漫 于 2007-7-12 17:31 编辑 ] |
|