arch/mips/kernel/head.S

torchof2008

arch/mips/kernel/head.S中设置setup_c0_status时的

    .macro setup_c0_status set clr
    .set    push
#ifdef CONFIG_MIPS_MT_SMTC
    /*
     * For SMTC, we need to set privilege and disable interrupts only for
     * the current TC, using the TCStatus register.
     */
    mfc0    t0, CP0_TCSTATUS
    /* Fortunately CU 0 is in the same place in both registers */
    /* Set TCU0, TMX, TKSU (for later inversion) and IXMT */
    li t1, ST0_CU0 | 0x08001c00
    or t0, t1
    /* Clear TKSU, leave IXMT */
    xori    t0, 0x00001800
    mtc0    t0, CP0_TCSTATUS
    _ehb
    /* We need to leave the global IE bit set, but clear EXL...*/
    mfc0    t0, CP0_STATUS
    or t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr
    xor t0, ST0_EXL | ST0_ERL | \clr
    mtc0    t0, CP0_STATUS
#else
    mfc0    t0, CP0_STATUS
    or t0, ST0_CU0|\set|0x1f|\clr
    xor t0, 0x1f|\clr
    mtc0    t0, CP0_STATUS
    .set    noreorder
    sll zero,3              # ehb
#endif
    .set    pop
    .endm

上面代码中，setup_c0_status set clr中的 set clr和| \set | \clr、|\set|0x1f|\clr是什么意思呢？查了一些资料没有找到答案，麻烦知道的网友解答一些。谢谢~~

amarant

就是宏展开。
例如setup_c0_status 10 20中的
     or t0, ST0_CU0|\set|0x1f|\clr
就成了
     or t0, ST0_CU0|10|0x1f|20

这些东西没什么资料，看看基本这么回事就行了。关于mips最好的书是see mips run，可以看看