[Marvell] Advanced Digital R&D 部门正在广发英雄帖

hwangbosh

这张英雄帖，你敢接嘛？！  
Marvell Advanced Digital R&D 部门正在广发英雄帖，一场新一代CACHE技术革新正在紧
锣密鼓地酝酿中，这张英雄帖，你敢接嘛？！  
  
小编美美姐姐深入Advanced Digital R&D 内部打探到了一手情报，来为大家揭开这“研发
力”满满的超研值团队的神秘面纱！  
  
-拥有成熟的CPU自主设计能力，成功设计出多代Marvell商用ARM兼容CPU以及无线通信DS
P；  
-成熟的Compiler自主设计能力，编译器和工具链解决方案与CPU/DSP技术无缝配合；  
-强大的Android VM性能提升能力，跻身世界商用最优解决方案之一；  
-来自清华、北大、浙大、中科院、复旦、上海交大、西安交大等国内顶尖学府的优秀CP
U设计人才组成的超研发力团队（嘿嘿，想和你们的学长学姐一起工作嘛）  
-由CEO直接带领FLC项目，正紧锣密鼓地设计研发下一代CACHE技术！  
-有木有感受到Advanced Digital R&D团队的超高研值呢？！如果你对CPU技术有兴趣，对自
己的专业水平 有自信！就快来接了这张英雄帖，加入美满英雄联盟！  
  
Advanced Digital R&D正在招募以下职位，请发送简历至al-china-hr@marvell.com  
邮件标题格式为“姓名-学校-意向职位-地点-unix”。  
  
职位一  
CPU Design Verification Engineer
Job Description:  
The candidate will be the key member of CPU team, participate in the  
development of next generation of high-end and state-of-art ARM based  
processors, and responsible for:  
-Work closely with architect and RTL designers  to understand the functional  
goals of the design, and verify the functionality correctness of the design.  
-Develop and execute functional verification test plans, including writing  
tests, developing behavioral checkers or coverage monitors.   
-Analyze coverage gaps and devise strategies to fill coverage holes.  
-Build up verification environment, including development of test benches and
  random test generators for block-level and processor-level simulation.  
-Help define and evolve our verification methodologies.   
  
Qualification:  
-MS/PhD in EE/CS (or equivalent).  
-Experience in CPU (or equivalent) verification, including test plan and test
  bench development, test case development and test coverage assessment.  
-Experience in assembly programming (ARM assembly preferred).  
-Experience using Perl or other UNIX scripting languages for flow automation.
   
-Knowledge of computer architecture (pipeline, out-of-order, cache) is a big  
plus.  
-Knowledge of constrained random verification methodologies such as UVM/OVM  
is a plus.  
-Experience in low power verification, gate level verification or formal  
verification is a plus.  
-Strong problem-solving skills.  
-Fluent communication in both Chinese and English is an advantage.  
  
职位二  
CPU Logic Design Engineer
Job Description:  
The candidate will be the key member of CPU team, participate in the  
development of next generation of high-end and state-of-art ARM based  
processors, and responsible for:  
-CPU micro-architecture definition, logic design and implementation.  
-Co-working with verification engineers to debug failing tests and resolve  
bugs.  
-Synthesis and timing analysis.  
-FPGA prototyping/debugging.   
  
Qualifications:  
-MS/PhD in EE/CS (or equivalent).  
-Strong Knowledge of computer architecture and micro-architecture.  
-Solid logic design skills with Verilog HDL, with on-hands experience in high
  speed and low power design.  
-Solid knowledge of synthesis and timing analysis.  
-Experience in processor design is a big plus.  
-Experience in FPGA debugging with LA is a plus.  
-Strong problem-solving skills.  
-Fluent communication in both Chinese and English is an advantage.  
  
职位三  
CPU Performance Modeling and Analysis Engineer
Job Description:  
The candidate will be the key member of CPU team and participate in the  
development of next generation of high-end and state-of-art ARM based  
application processors, and responsible for:  
- Design and develop performance model of processor and memory sub-system to  
help making design decisions.  
- Cowork with designers to understand the micro-architectures well for good  
accuracy.  
- Collect benchmarks and performance data, doing performance analysis and  
figure out bottlenecks.  
- Explore new/optimized micro-architectures and advanced modeling  
methodologies.  
  
Qualification:  
- MS/PhD in electronic engineering/computer science (or equivalent).  
- Solid knowledge of computer architecture and digital circuit design.  
- Experience in cycle accurate CPU (or equivalent) modeling, multi-processor  
is preferred.  
- Good programming and debugging skills in C/C++, experience also in Verilog R
TL design is a plus.  
- Strong abstraction skills for hardware behavior.  
- Fluent communication in both Chinese and English.  
  
职位四  
System Software Engineer  
Job Description:  
The work includes develop distributied operating system and boost performance  
on top of Marvell CPUs and memory controller, design and implement the  
customized server solution for IOT ecosystem:  
-Analysis cutting-edge distributied operating system and database for its  
architecture and hotspot of performance and low power.  
-Co-design with multi-core CPU and memory modeling for better performance and
  low-power.  
-Design and develop profiling tools for CPU performance analysis  
-Virtualization system development, runtime performance analysis and  
optimization  
  
Minimum Qualification:  
-BS/MS/PhD in computer science/electronic engineering (or equivalent)  
-Strong programming and debugging skill in C/C++/Java  
-Fluent communication in both Chinese and English  
Additional Preferred Qualification:  
-Experience in Java programming and big data background (Hadoop, Hive, Spark,
  Storm, Mahout, Lucene, MongoDB etc.)  
-Familiarity with at least one scripting language such as Ruby or Python  
-Knowledge of distributed operating system internals and theory of operation  
-Advanced UNIX programming concepts (pthreads, shared memory & other IPC,  
driver interface)  
-Knowledge and working experience on ARM architecture  
-Profiling and optimization, with essential knowledge of compiler/ assembler/
linker  
-Strong CPU architecture/micro-architecture knowledge  
  
职位五  
OS Development(Linux/RTOS) Engineer
Job Description:  
The work includes Operating System(Linux/RTOS) analysis, design and  
optimization; joint-design with Marvell CPUs and memory controller which are  
compatible to ARM v7/8 ISA:  
-Analysis cutting-edge Operating Systems for its architecture and hotspot of  
performance and low power.  
-Co-design with multi-core CPU and memory modeling for better performance and
  low-power.  
-Design and develop profiling tools for CPU performance analysis  
-Virtualization system development, runtime performance analysis and  
optimization  
  
Minimum Qualification:  
-BS/MS/PhD in computer science/electronic engineering (or equivalent)  
-Strong programming skill in C/C++  
-Knowledge of operating system internals and theory of operation  
-Advanced UNIX programming concepts (pthreads, shared memory & other IPC,  
driver interface)  
-Strong programming and debugging skills  
-Fluent communication in both Chinese and English  
Additional Preferred Qualification:  
-Knowledge of Android framework design and development  
-Knowledge and working experience on ARM architecture  
-Profiling and optimization, with essential knowledge of compiler/ assembler/
linker  
-Strong CPU architecture/micro-architecture knowledge  
  
职位六  
Compiler Software Engineer  
Job Description:  
The work includes software design/development of compiler toolchain for  
Marvell CPUs:  
- Solution of optimized compiler, assembler, linker, simulator for Marvell  
advanced DSP cores;  
- Bug-fixing and platform integration to make above solution production  
quality.  
- Analysis and joint design with CPU design team for better performance of  
micro-architecture of Marvell CPU cores.  
  
Qualification:  
- MS/PhD in computer science/electronic engineering (or equivalent).  
- Strong C/C++ programming skills. Solid knowledge in Data Structure and  
Algorithm.   
- Research or working experience in compiler/assembler/linker/library/
simulator.  
- Knowledge of DSP architecture, profiling and optimization is a great  
advantage.  
- Cooperative team player with good communication and teamwork skill.  
- Fluent communication in both Chinese and English is an advantage.  
  
职位七  
Java VM Software Engineer  
Job Description:  
The work includes software design/development of Java VM for Marvell Mobile, I
OT and big data software ecosystem:  
- Solution of optimized Java VM for Marvell advanced ARM cores;  
- Solution of optimized Android Runtime (ART);  
- Bug-fixing and platform integration to make above solution production  
quality.  
- Analysis and joint design with CPU design team for better performance of  
micro-architecture of Marvell CPU cores.  
  
Qualification:  
- MS/PhD in computer science/electronic engineering (or equivalent).  
- Strong C/C++ programming skills, and/or Java programming skills.  
- Solid knowledge in Computer Architecture, Data Structure and Algorithm.   
- Research or working experience in Java VM is a great advantage.  
- Knowledge of ARM architecture, profiling and optimization is a great  
advantage.  
- Cooperative team player with good communication and teamwork skill.  
- Fluent communication in both Chinese and English is an advantage.

rtm009

鸟语就搞死了 膜拜做硬件的大神