基于X86写的一个操作系统，有兴趣的一起开发[长期维护贴]

qianguozheng

没多少热度啊

sditmaner

谢谢分享 赞一个

Buddy_Zhang1

添加 string library
添加 .config & CONFIG_ 机制
添加测试代码机制

nswcfd

除了赞还能说啥呢 👍👍👍赞赞赞

Buddy_Zhang1

回复 14# nswcfd

有兴趣的话一起开发

Buddy_Zhang1

添加 interrupt0 - interrupt5 测试程序

interrupt0 - divide zero
interrupt1 - debug
interrupt2 - NMI
interrupt3 - breakpoint
interrupt4 - overflow
interrupt5 - bound error

Buddy_Zhang1

kernel interrupt 0 - interrupt 45 测试程序

1. /*
   
2. * Test code for Interrupt table
   
3. * Maintainer: Buddy <buddy.zhang@aliyun.com>
   
4. *
   
5. * Copyright (C) 2017 BiscuitOS
   
6. *
   
7. * This program is free software; you can redistribute it and/or modify
   
8. * it under the terms of the GNU General Public License version 2 as
   
9. * published by the Free Software Foundation.
   
10. */
    
11. 
    
12. #include <linux/kernel.h>
    
13. 
    
14. 
    
15. #ifdef CONFIG_TESTCODE
    
16. 
    
17. /*
    
18. * Test interrupt 0 - divide zero
    
19. * The processor generates a type 0 interrupt whenever executing a divide
    
20. * instruction—either 'div' (divide) or 'idiv' (integer divide)—results in
    
21. * a quotient that is larger than the destination specified. The default
    
22. * interrupt handler on Linux displays a Floating point exception message
    
23. * and terminates the program.
    
24. */
    
25. void test_interrupt0_divide_error(void)
    
26. {
    
27. #ifndef CONFIG_SOFT_INTERRUPT
    
28. #ifdef CONFIG_DIVIDE_ERROR0
    
29.         int a;
    
30.         int b = 0;
    
31. #else
    
32.         unsigned short _rax = 0xFFF;
    
33.         unsigned short _res;
    
34. #endif
    
35.        
    
36. #ifdef CONFIG_DIVIDE_ERROR0
    
37.         /* case 0 */
    
38.         /* divide error -> interrupt0 */
    
39.         a = 3 / b;       
    
40.         b = a;
    
41. #else
    
42.         /* case 1 */
    
43.         /*
    
44.          * EAX or AX can't store a rightful result-value
    
45.          * eg, _rax / 0x01 = 0xFFF, and "AL" can't store result '0xFFF'.
    
46.          */
    
47. 
    
48.         __asm__("mov %1, %%ax\n\t"
    
49.                         "movb $0x1, %%bl\n\t"
    
50.                         "div %%bl\n\t"
    
51.                         "movb %%al, %0"
    
52.                         : "=m" (_res) : "m" (_rax));
    
53.         printk("The result %#x\n", _res);
    
54. #endif /* CONFIG_DIVIDE_ERROR0 */
    
55. #else
    
56.         __asm__("int $0");
    
57. #endif /* CONFIG_SOFT_INTERRUPT */
    
58. }
    
59. 
    
60. /*
    
61. * Test interrupt 1 - debug
    
62. * Single-Step Interrupt Single-stepping is a useful debugging tool to
    
63. * observe the behavior of a program instruction by instruction. To start
    
64. * single-stepping, the trap flag (TF) bit in the flags register should
    
65. * be set (i.e., TF = 1). When TF is set, the CPU automatically generates
    
66. * a type 1 interrupt after executing each instruction. Some exceptions
    
67. * do exist, but we do not worry about them here.
    
68. * The interrupt handler for the type 1 interrupt can be used to display
    
69. * relevant information about the state of the program. For example,
    
70. * the contents of all registers could be displayed.
    
71. * To end single stepping, the TF should be cleared. The instruction set,
    
72. * however, does not have instructions to directly manipulate the TF bit.
    
73. * Instead, we have to resort to an indirect means. You have to push flags
    
74. * register using pushf and manipulate the TF bit and use popf to store this
    
75. * value back in the flags register. Here is an example code fragment that
    
76. * sets the trap flag.
    
77. */
    
78. void test_interrupt1_debug(void)
    
79. {
    
80. #ifndef CONFIG_SOFT_INTERRUPT
    
81.         /* case 0 */
    
82.         /*
    
83.          * Set TF on EFLAGS will invoke interrupt 1 (debug).
    
84.          */
    
85.         __asm__("pushl %%eax\n\t"
    
86.                         "pushf\n\t"
    
87.                         "movl %%esp, %%eax\n\t"
    
88.                         "orl $0x0100, (%%eax)\n\t" // set TF bit.
    
89.                         "popf\n\t"
    
90.                         "popl %%eax"
    
91.                         ::);
    
92. #else
    
93.         __asm__("int $1");
    
94. #endif
    
95. }
    
96. 
    
97. /*
    
98. * Test Interrupt 3 - NMI
    
99. * In computing, a non-maskable interrupt (NMI) is a hardware interrupt
    
100. * that standard interrupt-masking techniques in the system cannot ignore.
     
101. * It typically occurs to signal attention for non-recoverable hardware
     
102. * errors. (Some NMIs may be masked, but only by using proprietary methods
     
103. * specific to the particular NMI.)
     
104. * An NMI is often used when response time is critical or when an interrupt
     
105. * should never be disabled during normal system operation. Such uses
     
106. * include reporting non-recoverable hardware errors, system debugging
     
107. * and profiling, and handling of special cases like system resets.
     
108. */
     
109. void test_interrupt2_nmi(void)
     
110. {
     
111. #ifdef CONFIG_SOFT_INTERRUPT
     
112.         __asm__("int $2");       
     
113. #endif
     
114. }
     
115. 
     
116. /*
     
117. * Test Interrupt 3 - int3
     
118. * Breakpoint Interrupt If you have used a debugger, which you should
     
119. * have by now, you already know the usefulness of inserting breakpoints
     
120. * while debugging a program. The type 3 interrupt is dedicated to the
     
121. * breakpoint processing. This type of interrupt can be generated by
     
122. * using the special single-byte form of 'int3' (opcode CCH). Using the
     
123. * 'int3' instruction automatically causes the assembler to encode the
     
124. * instruction into the single-byte version. Note that the standard encoding
     
125. * for the 'int' instruction is two bytes long.
     
126. * Inserting a breakpoint in a program involves replacing the program
     
127. * code byte by CCH while saving the program byte for later restoration
     
128. * to remove the breakpoint. The standard 2-byte version of 'int3' can
     
129. * cause problems in certain situations, as there are instructions that
     
130. * require only a single byte to encode.
     
131. */
     
132. void test_interrupt3_int3(void)
     
133. {
     
134. #ifndef CONFIG_SOFT_INTERRUPT
     
135.         /* general interrupt entry */
     
136.         __asm__("pushl %%eax\n\t"
     
137.                         "pushf\n\t"
     
138.                         "movl %%esp, %%eax\n\t"
     
139.                         "orl $0x0100, (%%eax)\n\t"
     
140.                         "popf\n\t"
     
141.                         "popl %%eax"
     
142.                         ::);       
     
143. #else
     
144.         __asm__("int $3");
     
145. #endif
     
146. }
     
147. 
     
148. /*
     
149. * Test Interrupt 4 - overflow error
     
150. * The type 4 interrupt is dedicated to handle overflow conditions.
     
151. * There are two ways by which a type 4 interrupt can be generated:
     
152. * either by 'int4' or by 'into' . Like the breakpoint interrupt,
     
153. * 'into' requires only one byte to encode, as it does not require
     
154. * the specification of the interrupt type number as part of the
     
155. * instruction. Unlike 'int4', which unconditionally generates a
     
156. * type 4 interrupt, 'into' generates a type 4 interrupt only if the
     
157. * overflow flag is set. We do not normally use 'into' , as the
     
158. * overflow condition is usually detected and processed by using
     
159. * the conditional jump instructions 'jo' and 'jno'.
     
160. */
     
161. void test_interrupt4_overflow(void)
     
162. {
     
163. #ifndef CONFIG_SOFT_INTERRUPT
     
164.         /* case 0 */
     
165.         /*
     
166.          * 'OF' set and call 'into'
     
167.          */
     
168.         __asm__("pushl %%ebx\n\t"
     
169.                         "movb $0x7f, %%bl\n\t"
     
170.                         "addb $10, %%bl\n\t"
     
171.                         "into\n\t"
     
172.                         "popl %%ebx"
     
173.                         ::);
     
174. #else
     
175.         /* case 1 */
     
176.         __asm__("int $4");
     
177. #endif
     
178. }
     
179. 
     
180. /*
     
181. * Test Interrupt 5 - Bound error
     
182. * Determines if the first operand (array index) is within the bounds of
     
183. * an array specified the second operand (bounds operand). The array
     
184. * index is a signed integer located in a register. The bounds operand
     
185. * is a memory location that contains a pair of signed doubleword-integers
     
186. * (when the operand-size attribute is 32) or a pair of signed word-integers
     
187. * (when the operand-size attribute is 16). The first doubleword (or word)
     
188. * is the lower bound of the array and the second doubleword (or word)
     
189. * is the upper bound of the array. The array index must be greater than
     
190. * or equal to the lower bound and less than or equal to the upper bound
     
191. * plus the operand size in bytes.
     
192. * If the index is not within bounds, a BOUND range exceeded exception
     
193. * (#BR) is signaled. When this exception is generated, the saved return
     
194. * instruction pointer points to the BOUND instruction.
     
195. * The bounds limit data structure (two words or doublewords containing
     
196. * the lower and upper limits of the array) is usually placed just before
     
197. * the array itself, making the limits addressable via a constant offset
     
198. * from the beginning of the array. Because the address of the array already
     
199. * will be present in a register, this practice avoids extra bus cycles
     
200. * to obtain the effective address of the array bounds.
     
201. */
     
202. void test_interrupt5_bound(void)
     
203. {
     
204. #ifndef CONFIG_SOFT_INTERRUPT
     
205.         int buffer[2] = { 0, 6 };
     
206.         int index = 7; /* safe value: 0, 1, 2, 3, 4, 5, 6 */
     
207. 
     
208.         /* case 0 */
     
209.         /*
     
210.          * Upper = buffer[1]
     
211.          * lower = buffer[0]
     
212.          * if index < lower || index > upper
     
213.          * Invoke Bound interrupt.
     
214.          */
     
215.         __asm__("lea %0, %%edx\n\t"
     
216.                         "movl %1, %%eax\n\t"
     
217.                         "boundl %%eax, (%%edx)"
     
218.                         :: "m" (buffer), "m" (index));
     
219. #else
     
220.         __asm__("int $5");
     
221. #endif
     
222. }
     
223. 
     
224. /*
     
225. * Test Interrupt 6 - Invalid operand
     
226. */
     
227. void test_interrupt6_invalid_op(void)
     
228. {
     
229. #ifdef CONFIG_SOFT_INTERRUPT
     
230.         __asm__("int $6");
     
231. #endif
     
232. }
     
233. 
     
234. /*
     
235. * Test Interrupt 7 - device not available.
     
236. * Not used - 20170603
     
237. */
     
238. void test_interrupt7_device_not_available(void)
     
239. {
     
240. #ifdef CONFIG_SOFT_INTERRUPT
     
241.         __asm__("int $7");
     
242. #endif
     
243. }
     
244. 
     
245. /*
     
246. * Test Interrupt 8 - double fault
     
247. * On the x86 architecture, a double fault exception occurs if the
     
248. * processor encounters a problem while trying to service a pending
     
249. * interrupt or exception. An example situation when a double fault
     
250. * would occur is when an interrupt is triggered but the segment in
     
251. * which the interrupt handler resides is invalid. If the processor
     
252. * encounters a problem when calling the double fault handler, a triple
     
253. * fault is generated and the processor shuts down.
     
254. * As double faults can only happen due to kernel bugs, they are rarely
     
255. * caused by user space programs in a modern protected mode operating
     
256. * system, unless the program somehow gains kernel access (some viruses
     
257. * and also some low-level DOS programs). Other processors like PowerPC
     
258. * or SPARC generally save state to predefined and reserved machine
     
259. * registers. A double fault will then be a situation where another
     
260. * exception happens while the processor is still using the contents of
     
261. * these registers to process the exception. SPARC processors have four
     
262. * levels of such registers, i.e. they have a 4-window register system.
     
263. */
     
264. void test_interrupt8_double_fault(void)
     
265. {
     
266. #ifdef CONFIG_SOFT_INTERRUPT
     
267.         __asm__("int $8");
     
268. #endif
     
269. }
     
270. 
     
271. /*
     
272. * Test Interrupt 9 - Coprocessor segment overrun
     
273. */
     
274. void test_interrupt9_coprocessor_segment_overrun(void)
     
275. {
     
276. #ifdef CONFIG_SOFT_INTERRUPT
     
277.         __asm__("int $9");
     
278. #endif
     
279. }
     
280. 
     
281. /*
     
282. * Test Interrupt 10 - invalid TSS segment
     
283. */
     
284. void test_interrupt10_invalid_TSS(void)
     
285. {
     
286. #ifdef CONFIG_SOFT_INTERRUPT
     
287.         __asm__("int $10");
     
288. #endif
     
289. }
     
290. 
     
291. /*
     
292. * Test Interrupt 11 - Segment not present.
     
293. */
     
294. void test_interrupt11_segment_not_present(void)
     
295. {
     
296. #ifdef CONFIG_SOFT_INTERRUPT
     
297.         __asm__("int $11");
     
298. #endif
     
299. }
     
300. 
     
301. /*
     
302. * Test Interrupt 12 - Stack segment
     
303. */
     
304. void test_interrupt12_task_segment(void)
     
305. {
     
306. #ifdef CONFIG_SOFT_INTERRUPT
     
307.         __asm__("int $12");
     
308. #endif
     
309. }
     
310. 
     
311. /*
     
312. * Test Interrupt 13 - General protection
     
313. */
     
314. void test_interrupt13_general_protection(void)
     
315. {
     
316. #ifdef CONFIG_SOFT_INTERRUPT
     
317.         __asm__("int $13");
     
318. #endif
     
319. }
     
320. 
     
321. /*
     
322. * Test Interrupt 14 - page fault
     
323. * Cannot use
     
324. */
     
325. void test_interrupt14_page_fault(void)
     
326. {
     
327. #ifdef CONFIG_SOFT_INTERRUPT
     
328.         __asm__("int $14");
     
329. #endif
     
330. }
     
331. 
     
332. /*
     
333. * Test Interrupt 15 - Intel reserved
     
334. */
     
335. void test_interrupt15_intel_reserved(void)
     
336. {
     
337. #ifdef CONFIG_SOFT_INTERRUPT
     
338.         __asm__("int $15");
     
339. #endif
     
340. }
     
341. 
     
342. /*
     
343. * Test Interrupt 16 - Coprocessor error
     
344. * Cannot use
     
345. */
     
346. void test_interrupt16_coprocessor_error(void)
     
347. {
     
348. #ifdef CONFIG_SOFT_INTERRUPT
     
349.         __asm__("int $16");       
     
350. #endif
     
351. }
     
352. 
     
353. /*
     
354. * Test Interrupt 17-48 - Intel Reserved
     
355. */
     
356. void test_interrupt17_47_Reserved(void)
     
357. {
     
358. #ifdef CONFIG_SOFT_INTERRUPT
     
359.         //__asm__("int $17");
     
360.         __asm__("int $47");
     
361. #endif
     
362. }
     
363. 
     
364. /*
     
365. * Test Interrupt 39 - parallel interrupt
     
366. */
     
367. void test_interrupt39_parallel_interrupt(void)
     
368. {
     
369. #ifdef CONFIG_SOFT_INTERRUPT
     
370.         __asm__("int $39");
     
371. #endif
     
372. }
     
373. 
     
374. /*
     
375. * Test Interrupt 45 - irq13
     
376. * Cannot use
     
377. */
     
378. void test_interrupt45_irq13(void)
     
379. {
     
380. #ifdef CONFIG_SOFT_INTERRUPT
     
381.         __asm__("int $45");
     
382. #endif
     
383. }
     
384. #endif

复制代码

lmarsin

支持下楼主

anenbupt

工作没时间了。要是还在大学一定搞起。。。