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楼主: Buddy_Zhang1

[实践] 基于X86写的一个操作系统,有兴趣的一起开发[长期维护贴] [复制链接]

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发表于 2017-05-28 16:15 |显示全部楼层
没多少热度啊

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发表于 2017-05-29 11:17 |显示全部楼层
谢谢分享 赞一个

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发表于 2017-05-30 22:11 |显示全部楼层
添加 string library
添加 .config & CONFIG_ 机制
添加测试代码机制

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发表于 2017-05-31 09:58 |显示全部楼层
本帖最后由 nswcfd 于 2017-05-31 09:59 编辑

除了赞还能说啥呢 👍👍👍赞赞赞

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发表于 2017-06-01 12:29 |显示全部楼层
回复 14# nswcfd

有兴趣的话一起开发

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日期:2017-02-20 23:32:43
发表于 2017-06-03 20:14 |显示全部楼层
添加 interrupt0 - interrupt5 测试程序

interrupt0 - divide zero
interrupt1 - debug
interrupt2 - NMI
interrupt3 - breakpoint
interrupt4 - overflow
interrupt5 - bound error

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日期:2017-02-20 23:32:43
发表于 2017-06-04 16:18 |显示全部楼层
kernel interrupt 0 - interrupt 45 测试程序

  1. /*
  2. * Test code for Interrupt table
  3. * Maintainer: Buddy <buddy.zhang@aliyun.com>
  4. *
  5. * Copyright (C) 2017 BiscuitOS
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */

  11. #include <linux/kernel.h>


  12. #ifdef CONFIG_TESTCODE

  13. /*
  14. * Test interrupt 0 - divide zero
  15. * The processor generates a type 0 interrupt whenever executing a divide
  16. * instruction—either 'div' (divide) or 'idiv' (integer divide)—results in
  17. * a quotient that is larger than the destination specified. The default
  18. * interrupt handler on Linux displays a Floating point exception message
  19. * and terminates the program.
  20. */
  21. void test_interrupt0_divide_error(void)
  22. {
  23. #ifndef CONFIG_SOFT_INTERRUPT
  24. #ifdef CONFIG_DIVIDE_ERROR0
  25.         int a;
  26.         int b = 0;
  27. #else
  28.         unsigned short _rax = 0xFFF;
  29.         unsigned short _res;
  30. #endif
  31.        
  32. #ifdef CONFIG_DIVIDE_ERROR0
  33.         /* case 0 */
  34.         /* divide error -> interrupt0 */
  35.         a = 3 / b;       
  36.         b = a;
  37. #else
  38.         /* case 1 */
  39.         /*
  40.          * EAX or AX can't store a rightful result-value
  41.          * eg, _rax / 0x01 = 0xFFF, and "AL" can't store result '0xFFF'.
  42.          */

  43.         __asm__("mov %1, %%ax\n\t"
  44.                         "movb $0x1, %%bl\n\t"
  45.                         "div %%bl\n\t"
  46.                         "movb %%al, %0"
  47.                         : "=m" (_res) : "m" (_rax));
  48.         printk("The result %#x\n", _res);
  49. #endif /* CONFIG_DIVIDE_ERROR0 */
  50. #else
  51.         __asm__("int $0");
  52. #endif /* CONFIG_SOFT_INTERRUPT */
  53. }

  54. /*
  55. * Test interrupt 1 - debug
  56. * Single-Step Interrupt Single-stepping is a useful debugging tool to
  57. * observe the behavior of a program instruction by instruction. To start
  58. * single-stepping, the trap flag (TF) bit in the flags register should
  59. * be set (i.e., TF = 1). When TF is set, the CPU automatically generates
  60. * a type 1 interrupt after executing each instruction. Some exceptions
  61. * do exist, but we do not worry about them here.
  62. * The interrupt handler for the type 1 interrupt can be used to display
  63. * relevant information about the state of the program. For example,
  64. * the contents of all registers could be displayed.
  65. * To end single stepping, the TF should be cleared. The instruction set,
  66. * however, does not have instructions to directly manipulate the TF bit.
  67. * Instead, we have to resort to an indirect means. You have to push flags
  68. * register using pushf and manipulate the TF bit and use popf to store this
  69. * value back in the flags register. Here is an example code fragment that
  70. * sets the trap flag.
  71. */
  72. void test_interrupt1_debug(void)
  73. {
  74. #ifndef CONFIG_SOFT_INTERRUPT
  75.         /* case 0 */
  76.         /*
  77.          * Set TF on EFLAGS will invoke interrupt 1 (debug).
  78.          */
  79.         __asm__("pushl %%eax\n\t"
  80.                         "pushf\n\t"
  81.                         "movl %%esp, %%eax\n\t"
  82.                         "orl $0x0100, (%%eax)\n\t" // set TF bit.
  83.                         "popf\n\t"
  84.                         "popl %%eax"
  85.                         ::);
  86. #else
  87.         __asm__("int $1");
  88. #endif
  89. }

  90. /*
  91. * Test Interrupt 3 - NMI
  92. * In computing, a non-maskable interrupt (NMI) is a hardware interrupt
  93. * that standard interrupt-masking techniques in the system cannot ignore.
  94. * It typically occurs to signal attention for non-recoverable hardware
  95. * errors. (Some NMIs may be masked, but only by using proprietary methods
  96. * specific to the particular NMI.)
  97. * An NMI is often used when response time is critical or when an interrupt
  98. * should never be disabled during normal system operation. Such uses
  99. * include reporting non-recoverable hardware errors, system debugging
  100. * and profiling, and handling of special cases like system resets.
  101. */
  102. void test_interrupt2_nmi(void)
  103. {
  104. #ifdef CONFIG_SOFT_INTERRUPT
  105.         __asm__("int $2");       
  106. #endif
  107. }

  108. /*
  109. * Test Interrupt 3 - int3
  110. * Breakpoint Interrupt If you have used a debugger, which you should
  111. * have by now, you already know the usefulness of inserting breakpoints
  112. * while debugging a program. The type 3 interrupt is dedicated to the
  113. * breakpoint processing. This type of interrupt can be generated by
  114. * using the special single-byte form of 'int3' (opcode CCH). Using the
  115. * 'int3' instruction automatically causes the assembler to encode the
  116. * instruction into the single-byte version. Note that the standard encoding
  117. * for the 'int' instruction is two bytes long.
  118. * Inserting a breakpoint in a program involves replacing the program
  119. * code byte by CCH while saving the program byte for later restoration
  120. * to remove the breakpoint. The standard 2-byte version of 'int3' can
  121. * cause problems in certain situations, as there are instructions that
  122. * require only a single byte to encode.
  123. */
  124. void test_interrupt3_int3(void)
  125. {
  126. #ifndef CONFIG_SOFT_INTERRUPT
  127.         /* general interrupt entry */
  128.         __asm__("pushl %%eax\n\t"
  129.                         "pushf\n\t"
  130.                         "movl %%esp, %%eax\n\t"
  131.                         "orl $0x0100, (%%eax)\n\t"
  132.                         "popf\n\t"
  133.                         "popl %%eax"
  134.                         ::);       
  135. #else
  136.         __asm__("int $3");
  137. #endif
  138. }

  139. /*
  140. * Test Interrupt 4 - overflow error
  141. * The type 4 interrupt is dedicated to handle overflow conditions.
  142. * There are two ways by which a type 4 interrupt can be generated:
  143. * either by 'int4' or by 'into' . Like the breakpoint interrupt,
  144. * 'into' requires only one byte to encode, as it does not require
  145. * the specification of the interrupt type number as part of the
  146. * instruction. Unlike 'int4', which unconditionally generates a
  147. * type 4 interrupt, 'into' generates a type 4 interrupt only if the
  148. * overflow flag is set. We do not normally use 'into' , as the
  149. * overflow condition is usually detected and processed by using
  150. * the conditional jump instructions 'jo' and 'jno'.
  151. */
  152. void test_interrupt4_overflow(void)
  153. {
  154. #ifndef CONFIG_SOFT_INTERRUPT
  155.         /* case 0 */
  156.         /*
  157.          * 'OF' set and call 'into'
  158.          */
  159.         __asm__("pushl %%ebx\n\t"
  160.                         "movb $0x7f, %%bl\n\t"
  161.                         "addb $10, %%bl\n\t"
  162.                         "into\n\t"
  163.                         "popl %%ebx"
  164.                         ::);
  165. #else
  166.         /* case 1 */
  167.         __asm__("int $4");
  168. #endif
  169. }

  170. /*
  171. * Test Interrupt 5 - Bound error
  172. * Determines if the first operand (array index) is within the bounds of
  173. * an array specified the second operand (bounds operand). The array
  174. * index is a signed integer located in a register. The bounds operand
  175. * is a memory location that contains a pair of signed doubleword-integers
  176. * (when the operand-size attribute is 32) or a pair of signed word-integers
  177. * (when the operand-size attribute is 16). The first doubleword (or word)
  178. * is the lower bound of the array and the second doubleword (or word)
  179. * is the upper bound of the array. The array index must be greater than
  180. * or equal to the lower bound and less than or equal to the upper bound
  181. * plus the operand size in bytes.
  182. * If the index is not within bounds, a BOUND range exceeded exception
  183. * (#BR) is signaled. When this exception is generated, the saved return
  184. * instruction pointer points to the BOUND instruction.
  185. * The bounds limit data structure (two words or doublewords containing
  186. * the lower and upper limits of the array) is usually placed just before
  187. * the array itself, making the limits addressable via a constant offset
  188. * from the beginning of the array. Because the address of the array already
  189. * will be present in a register, this practice avoids extra bus cycles
  190. * to obtain the effective address of the array bounds.
  191. */
  192. void test_interrupt5_bound(void)
  193. {
  194. #ifndef CONFIG_SOFT_INTERRUPT
  195.         int buffer[2] = { 0, 6 };
  196.         int index = 7; /* safe value: 0, 1, 2, 3, 4, 5, 6 */

  197.         /* case 0 */
  198.         /*
  199.          * Upper = buffer[1]
  200.          * lower = buffer[0]
  201.          * if index < lower || index > upper
  202.          * Invoke Bound interrupt.
  203.          */
  204.         __asm__("lea %0, %%edx\n\t"
  205.                         "movl %1, %%eax\n\t"
  206.                         "boundl %%eax, (%%edx)"
  207.                         :: "m" (buffer), "m" (index));
  208. #else
  209.         __asm__("int $5");
  210. #endif
  211. }

  212. /*
  213. * Test Interrupt 6 - Invalid operand
  214. */
  215. void test_interrupt6_invalid_op(void)
  216. {
  217. #ifdef CONFIG_SOFT_INTERRUPT
  218.         __asm__("int $6");
  219. #endif
  220. }

  221. /*
  222. * Test Interrupt 7 - device not available.
  223. * Not used - 20170603
  224. */
  225. void test_interrupt7_device_not_available(void)
  226. {
  227. #ifdef CONFIG_SOFT_INTERRUPT
  228.         __asm__("int $7");
  229. #endif
  230. }

  231. /*
  232. * Test Interrupt 8 - double fault
  233. * On the x86 architecture, a double fault exception occurs if the
  234. * processor encounters a problem while trying to service a pending
  235. * interrupt or exception. An example situation when a double fault
  236. * would occur is when an interrupt is triggered but the segment in
  237. * which the interrupt handler resides is invalid. If the processor
  238. * encounters a problem when calling the double fault handler, a triple
  239. * fault is generated and the processor shuts down.
  240. * As double faults can only happen due to kernel bugs, they are rarely
  241. * caused by user space programs in a modern protected mode operating
  242. * system, unless the program somehow gains kernel access (some viruses
  243. * and also some low-level DOS programs). Other processors like PowerPC
  244. * or SPARC generally save state to predefined and reserved machine
  245. * registers. A double fault will then be a situation where another
  246. * exception happens while the processor is still using the contents of
  247. * these registers to process the exception. SPARC processors have four
  248. * levels of such registers, i.e. they have a 4-window register system.
  249. */
  250. void test_interrupt8_double_fault(void)
  251. {
  252. #ifdef CONFIG_SOFT_INTERRUPT
  253.         __asm__("int $8");
  254. #endif
  255. }

  256. /*
  257. * Test Interrupt 9 - Coprocessor segment overrun
  258. */
  259. void test_interrupt9_coprocessor_segment_overrun(void)
  260. {
  261. #ifdef CONFIG_SOFT_INTERRUPT
  262.         __asm__("int $9");
  263. #endif
  264. }

  265. /*
  266. * Test Interrupt 10 - invalid TSS segment
  267. */
  268. void test_interrupt10_invalid_TSS(void)
  269. {
  270. #ifdef CONFIG_SOFT_INTERRUPT
  271.         __asm__("int $10");
  272. #endif
  273. }

  274. /*
  275. * Test Interrupt 11 - Segment not present.
  276. */
  277. void test_interrupt11_segment_not_present(void)
  278. {
  279. #ifdef CONFIG_SOFT_INTERRUPT
  280.         __asm__("int $11");
  281. #endif
  282. }

  283. /*
  284. * Test Interrupt 12 - Stack segment
  285. */
  286. void test_interrupt12_task_segment(void)
  287. {
  288. #ifdef CONFIG_SOFT_INTERRUPT
  289.         __asm__("int $12");
  290. #endif
  291. }

  292. /*
  293. * Test Interrupt 13 - General protection
  294. */
  295. void test_interrupt13_general_protection(void)
  296. {
  297. #ifdef CONFIG_SOFT_INTERRUPT
  298.         __asm__("int $13");
  299. #endif
  300. }

  301. /*
  302. * Test Interrupt 14 - page fault
  303. * Cannot use
  304. */
  305. void test_interrupt14_page_fault(void)
  306. {
  307. #ifdef CONFIG_SOFT_INTERRUPT
  308.         __asm__("int $14");
  309. #endif
  310. }

  311. /*
  312. * Test Interrupt 15 - Intel reserved
  313. */
  314. void test_interrupt15_intel_reserved(void)
  315. {
  316. #ifdef CONFIG_SOFT_INTERRUPT
  317.         __asm__("int $15");
  318. #endif
  319. }

  320. /*
  321. * Test Interrupt 16 - Coprocessor error
  322. * Cannot use
  323. */
  324. void test_interrupt16_coprocessor_error(void)
  325. {
  326. #ifdef CONFIG_SOFT_INTERRUPT
  327.         __asm__("int $16");       
  328. #endif
  329. }

  330. /*
  331. * Test Interrupt 17-48 - Intel Reserved
  332. */
  333. void test_interrupt17_47_Reserved(void)
  334. {
  335. #ifdef CONFIG_SOFT_INTERRUPT
  336.         //__asm__("int $17");
  337.         __asm__("int $47");
  338. #endif
  339. }

  340. /*
  341. * Test Interrupt 39 - parallel interrupt
  342. */
  343. void test_interrupt39_parallel_interrupt(void)
  344. {
  345. #ifdef CONFIG_SOFT_INTERRUPT
  346.         __asm__("int $39");
  347. #endif
  348. }

  349. /*
  350. * Test Interrupt 45 - irq13
  351. * Cannot use
  352. */
  353. void test_interrupt45_irq13(void)
  354. {
  355. #ifdef CONFIG_SOFT_INTERRUPT
  356.         __asm__("int $45");
  357. #endif
  358. }
  359. #endif
复制代码

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发表于 2017-06-20 18:06 |显示全部楼层
支持下楼主

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发表于 2017-06-20 22:29 |显示全部楼层
工作没时间了。要是还在大学一定搞起。。。
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