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有一SUN F6800服务器C域有时setkey on时无法启动,有时反复几次setkey off/on后系统能正常启动,报错信息和启动过程在下面:
另:硬件未报黄灯
sc0:C> setkeyswitch on
Powering boards on ...
Testing CPU Boards ...
{/N0/SB3/P2} Running CPU POR and Set Clocks
{/N0/SB3/P3} Running CPU POR and Set Clocks
{/N0/SB3/P2} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P3} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P0} Running CPU POR and Set Clocks
{/N0/SB3/P1} Running CPU POR and Set Clocks
{/N0/SB3/P0} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P1} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P0} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P0} Use is subject to license terms.
{/N0/SB3/P1} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P1} Use is subject to license terms.
{/N0/SB3/P0} Subtest: Setting Fireplane Config Registers for aid 0xc
{/N0/SB3/P1} Subtest: Setting Fireplane Config Registers for aid 0xd
{/N0/SB3/P2} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P3} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P2} Use is subject to license terms.
{/N0/SB3/P2} Subtest: Setting Fireplane Config Registers for aid 0xe
{/N0/SB3/P0} Subtest: Display CPU Version, frequency
{/N0/SB3/P2} Subtest: Display CPU Version, frequency
{/N0/SB3/P2} Version register = 003e0015.b0000507
{/N0/SB3/P2} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB3/P1} Subtest: Display CPU Version, frequency
{/N0/SB3/P3} Use is subject to license terms.
{/N0/SB3/P3} Subtest: Setting Fireplane Config Registers for aid 0xf
{/N0/SB3/P3} Subtest: Display CPU Version, frequency
{/N0/SB3/P3} Version register = 003e0015.b0000507
{/N0/SB3/P3} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB3/P0} Version register = 003e0015.b0000507
{/N0/SB3/P0} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB3/P1} Version register = 003e0015.b0000507
{/N0/SB3/P1} Cpu/System ratio = 8, cpu actual frequency = 1200
{/N0/SB3/P2} Running Basic CPU
{/N0/SB3/P0} Running Basic CPU
{/N0/SB3/P3} Running Basic CPU
{/N0/SB3/P1} Running Basic CPU
{/N0/SB3/P2} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P0} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P3} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P1} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P2} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P2} Use is subject to license terms.
{/N0/SB3/P2} Subtest: I-Cache Initialization
{/N0/SB3/P3} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P3} Use is subject to license terms.
{/N0/SB3/P3} Subtest: I-Cache Initialization
{/N0/SB3/P3} Subtest: D-Cache Initialization
{/N0/SB3/P2} Subtest: D-Cache Initialization
{/N0/SB3/P0} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P3} Subtest: W-Cache Initialization
{/N0/SB3/P0} Use is subject to license terms.
{/N0/SB3/P0} Subtest: I-Cache Initialization
{/N0/SB3/P0} Subtest: D-Cache Initialization
{/N0/SB3/P1} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P1} Use is subject to license terms.
{/N0/SB3/P1} Subtest: I-Cache Initialization
{/N0/SB3/P1} Subtest: D-Cache Initialization
{/N0/SB3/P1} Subtest: W-Cache Initialization
{/N0/SB3/P1} Subtest: P-Cache Initialization
{/N0/SB3/P1} Subtest: Branch Prediction Initialization
{/N0/SB3/P1} Subtest: E-Cache Global Variables Initialization
{/N0/SB3/P1} Subtest: Fast Init. Verification Test
{/N0/SB3/P0} Subtest: W-Cache Initialization
{/N0/SB3/P2} Subtest: W-Cache Initialization
{/N0/SB3/P3} Subtest: P-Cache Initialization
{/N0/SB3/P0} Subtest: P-Cache Initialization
{/N0/SB3/P2} Subtest: P-Cache Initialization
{/N0/SB3/P3} Subtest: Branch Prediction Initialization
{/N0/SB3/P0} Subtest: Branch Prediction Initialization
{/N0/SB3/P2} Subtest: Branch Prediction Initialization
{/N0/SB3/P3} Subtest: E-Cache Global Variables Initialization
{/N0/SB3/P0} Subtest: E-Cache Global Variables Initialization
{/N0/SB3/P2} Subtest: E-Cache Global Variables Initialization
{/N0/SB3/P3} Subtest: Fast Init. Verification Test
{/N0/SB3/P0} Subtest: Fast Init. Verification Test
{/N0/SB3/P2} Subtest: Fast Init. Verification Test
{/N0/SB3/P0} Running Enable MMU
{/N0/SB3/P1} Running Enable MMU
{/N0/SB3/P2} Running Enable MMU
{/N0/SB3/P3} Running Enable MMU
{/N0/SB3/P0} Subtest: IMMU Initialization
{/N0/SB3/P1} Subtest: IMMU Initialization
{/N0/SB3/P2} Subtest: IMMU Initialization
{/N0/SB3/P3} Subtest: IMMU Initialization
{/N0/SB3/P0} Subtest: DMMU Initialization
{/N0/SB3/P1} Subtest: DMMU Initialization
{/N0/SB3/P0} Subtest: Map LPOST to local space
{/N0/SB3/P1} Subtest: Map LPOST to local space
{/N0/SB3/P2} Subtest: DMMU Initialization
{/N0/SB3/P3} Subtest: DMMU Initialization
{/N0/SB3/P2} Subtest: Map LPOST to local space
{/N0/SB3/P3} Subtest: Map LPOST to local space
{/N0/SB3/P2} Running Basic Ecache
{/N0/SB3/P3} Running Basic Ecache
{/N0/SB3/P0} Running Basic Ecache
{/N0/SB3/P1} Running Basic Ecache
{/N0/SB3/P2} Subtest: E-Cache Initialization of first 1K
{/N0/SB3/P3} Subtest: E-Cache Initialization of first 1K
{/N0/SB3/P2} Subtest: E-Cache Initialization
{/N0/SB3/P3} Subtest: E-Cache Initialization
{/N0/SB3/P0} Subtest: E-Cache Initialization of first 1K
{/N0/SB3/P1} Subtest: E-Cache Initialization of first 1K
{/N0/SB3/P0} Subtest: E-Cache Initialization
{/N0/SB3/P1} Subtest: E-Cache Initialization
{/N0/SB3/P2} Running Memory Registers Tests
{/N0/SB3/P3} Running Memory Registers Tests
{/N0/SB3/P0} Running Memory Registers Tests
{/N0/SB3/P1} Running Memory Registers Tests
{/N0/SB3/P2} Subtest: Disable Memory Controllers
{/N0/SB3/P0} Subtest: Disable Memory Controllers
{/N0/SB3/P3} Subtest: Disable Memory Controllers
{/N0/SB3/P1} Subtest: Disable Memory Controllers
{/N0/SB3/P0} Running Memory Configuration Tests
{/N0/SB3/P2} Running Memory Configuration Tests
{/N0/SB3/P1} Running Memory Configuration Tests
{/N0/SB3/P3} Running Memory Configuration Tests
{/N0/SB3/P0} Subtest: Memory Controller Configuration
{/N0/SB3/P2} Subtest: Memory Controller Configuration
{/N0/SB3/P1} Subtest: Memory Controller Configuration
{/N0/SB3/P3} Subtest: Memory Controller Configuration
{/N0/SB3/P0} Subtest: UP Memory Clear
{/N0/SB3/P1} Subtest: UP Memory Clear
{/N0/SB3/P2} Subtest: UP Memory Clear
{/N0/SB3/P3} Subtest: UP Memory Clear
{/N0/SB3/P0} Running Board Memory Interleave
{/N0/SB3/P1} Running Board Memory Interleave
{/N0/SB3/P2} Running Board Memory Interleave
{/N0/SB3/P3} Running Board Memory Interleave
{/N0/SB3/P0} Subtest: Board Memory Interleave Configuration
{/N0/SB3/P1} Subtest: Board Memory Interleave Configuration
{/N0/SB3/P2} Subtest: Board Memory Interleave Configuration
{/N0/SB3/P3} Subtest: Board Memory Interleave Configuration
{/N0/SB3/P0} Passed
{/N0/SB3/P1} Passed
{/N0/SB3/P2} Passed
{/N0/SB3/P3} Passed
/N0/IB9 : Failed AR interconnect test. Status = 00080004
IB9/ar0 Bit in error P3_ADDR [6]
Jul 03 23:01:35 cwsc0 Domain-C.SC: AR Interconnect test: System board IB9/ar0 address repeater connections to system board RP2/ar0 failed
Testing IO Boards ...
Copying IO prom to Cpu dram
.Jul 03 23:01:45 cwsc0 Domain-C.SC: ErrorMonitor: Domain C has a SYSTEM ERROR
Jul 03 23:01:45 cwsc0 Domain-C.SC: /N0/IB9 encountered the first error
Jul 03 23:01:45 cwsc0 Domain-C.SC: RP2 encountered the first error
Jul 03 23:01:45 cwsc0 Domain-C.SC: ArAsic reported first error on /N0/IB9
Jul 03 23:01:45 cwsc0 Domain-C.SC:
/partition1/domain0/IB9/ar0:
>>> SafariPortError6[0x260] : 0x00008001
AdrPErr [00:00] : 0x1 Address parity error
FE [15:15] : 0x1
Jul 03 23:01:45 cwsc0 Domain-C.SC:
Jul 03 23:01:45 cwsc0 Domain-C.SC:
/partition1/RP2/ar0:
>>> SafariPortError9[0x290] : 0x00008001
AdrPErr [00:00] : 0x1 Address parity error
FE [15:15] : 0x1
Jul 03 23:01:56 cwsc0 Domain-C.SC: [AD] Event: SF6800.ASIC.AR.ADR_PERR.10442006
CSN: 0350HH225B DomainID: C ADInfo: 1.SCAPP.15.3
Time: Tue Jul 03 23:01:46 GMT+08:00 2007
FRU-List-Count: 2; FRU-PN: 5014404; FRU-SN: 046949; FRU-LOC: /N0/IB9
FRU-PN: 5016418; FRU-SN: 002590; FRU-LOC: RP2
Recommended-Action: Service action required
Jul 03 23:01:56 cwsc0 Domain-C.SC: Domain C is currently paused due to an error. This domain must be turned off via "setkeyswitch off" to recover
..Jul 03 23:02:00 cwsc0 Domain-C.POST: {/N0/SB3/P0} not responding
................................
{/N0/SB3/P0} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P0} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P0} Use is subject to license terms.
{/N0/IB7/P0} Unknown
{/N0/IB7/P1} Unknown
Jul 03 23:02:06 cwsc0 Domain-C.SC: Excluded unusable, unlicensed, failed or disabled board: /N0/IB7
Copying IO prom to Cpu dram
....Jul 03 23:02:23 cwsc0 Domain-C.POST: {/N0/SB3/P1} not responding
...............................
{/N0/SB3/P1} @(#) lpost 5.15.3 2003/09/30 23:01
{/N0/SB3/P1} Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved.
{/N0/SB3/P1} Use is subject to license terms.
{/N0/IB9/P0} Unknown
{/N0/IB9/P1} Unknown
Jul 03 23:02:28 cwsc0 Domain-C.SC: Excluded unusable, unlicensed, failed or disabled board: /N0/IB9
Jul 03 23:02:28 cwsc0 Domain-C.SC: No usable Io board in domain.
setkeyswitch operation did not complete
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